Home
last modified time | relevance | path

Searched refs:GENMASK_ULL (Results 1 – 25 of 263) sorted by relevance

1234567891011

/linux-6.3-rc2/drivers/infiniband/hw/irdma/
A Ddefs.h484 #define IRDMACQ_QPID GENMASK_ULL(55, 32)
491 #define IRDMACQ_OP GENMASK_ULL(61, 56)
730 #define IRDMAQPC_TTL GENMASK_ULL(7, 0)
735 #define IRDMAQPC_TOS GENMASK_ULL(31, 24)
756 #define IRDMAQPC_PKEY GENMASK_ULL(47, 32)
758 #define IRDMAQPC_QKEY GENMASK_ULL(63, 32)
765 #define IRDMAQPC_ISN GENMASK_ULL(55, 32)
767 #define IRDMAQPC_LSN GENMASK_ULL(55, 32)
770 #define IRDMAQPC_EPSN GENMASK_ULL(23, 0)
776 #define IRDMAQPC_SRTT GENMASK_ULL(31, 0)
[all …]
A Duda_d.h25 #define IRDMA_UDA_QPSQ_AHIDX GENMASK_ULL(16, 0)
26 #define IRDMA_UDA_QPSQ_PROTOCOL GENMASK_ULL(23, 16)
29 #define IRDMA_UDA_QPSQ_MACLEN GENMASK_ULL(62, 56)
31 #define IRDMA_UDA_QPSQ_IPLEN GENMASK_ULL(54, 48)
33 #define IRDMA_UDA_QPSQ_L4T GENMASK_ULL(31, 30)
35 #define IRDMA_UDA_QPSQ_IIPT GENMASK_ULL(29, 28)
41 #define IRDMA_UDA_QPSQ_IMMDATA GENMASK_ULL(63, 0)
78 #define IRDMA_UDAQPC_IPID GENMASK_ULL(47, 32)
79 #define IRDMA_UDAQPC_SNDMSS GENMASK_ULL(29, 16)
80 #define IRDMA_UDAQPC_VLANTAG GENMASK_ULL(15, 0)
[all …]
A Dicrdma_hw.h54 #define ICRDMA_CQPSQ_STAG_PDID GENMASK_ULL(63, 46)
56 #define ICRDMA_CQPSQ_CQ_CEQID GENMASK_ULL(31, 22)
58 #define ICRDMA_CQPSQ_CQ_CQID GENMASK_ULL(18, 0)
60 #define ICRDMA_COMMIT_FPM_CQCNT GENMASK_ULL(19, 0)
/linux-6.3-rc2/drivers/iommu/arm/arm-smmu-v3/
A Darm-smmu-v3.h204 #define STRTAB_STE_0_CFG GENMASK_ULL(3, 1)
323 #define CMDQ_0_OP GENMASK_ULL(7, 0)
378 #define EVTQ_0_ID GENMASK_ULL(7, 0)
386 #define EVTQ_0_SSID GENMASK_ULL(31, 12)
387 #define EVTQ_0_SID GENMASK_ULL(63, 32)
388 #define EVTQ_1_STAG GENMASK_ULL(15, 0)
394 #define EVTQ_1_CLASS GENMASK_ULL(41, 40)
396 #define EVTQ_2_ADDR GENMASK_ULL(63, 0)
397 #define EVTQ_3_IPA GENMASK_ULL(51, 12)
404 #define PRIQ_0_SID GENMASK_ULL(31, 0)
[all …]
/linux-6.3-rc2/drivers/net/ethernet/marvell/octeontx2/af/
A Dcgx_fw_if.h170 #define EVTREG_ID GENMASK_ULL(8, 3)
177 #define EVTREG_ERRTYPE GENMASK_ULL(18, 9)
182 #define RESP_MAJOR_VER GENMASK_ULL(12, 9)
183 #define RESP_MINOR_VER GENMASK_ULL(16, 13)
188 #define RESP_MAC_ADDR GENMASK_ULL(56, 9)
203 #define RESP_FWD_BASE GENMASK_ULL(56, 9)
228 #define RESP_LINKSTAT_UP GENMASK_ULL(9, 9)
240 #define CMDREG_ID GENMASK_ULL(7, 2)
249 #define CMDMTU_SIZE GENMASK_ULL(23, 8)
256 #define CMDSETFEC GENMASK_ULL(9, 8)
[all …]
A Dnpc.h397 #define NPC_EXACT_NIBBLE GENMASK_ULL(43, 40)
406 #define NPC_EXACT_RESULT_OPC GENMASK_ULL(2, 1)
411 #define NPC_PARSE_NIBBLE GENMASK_ULL(30, 0)
454 #define RX_VTAG0_LID_MASK GENMASK_ULL(10, 8)
458 #define RX_VTAG1_LID_MASK GENMASK_ULL(42, 40)
462 #define TX_VTAG0_DEF_MASK GENMASK_ULL(25, 16)
463 #define TX_VTAG0_OP_MASK GENMASK_ULL(13, 12)
464 #define TX_VTAG0_LID_MASK GENMASK_ULL(10, 8)
466 #define TX_VTAG1_DEF_MASK GENMASK_ULL(57, 48)
467 #define TX_VTAG1_OP_MASK GENMASK_ULL(45, 44)
[all …]
A Drvu_npc_hash.h98 GENMASK_ULL(63, 0),
99 GENMASK_ULL(63, 0),
102 GENMASK_ULL(63, 0),
103 GENMASK_ULL(63, 0),
109 GENMASK_ULL(63, 0),
110 GENMASK_ULL(63, 0),
113 GENMASK_ULL(63, 0),
114 GENMASK_ULL(63, 0),
121 [0] = GENMASK_ULL(63, 32), /* MSB 32 bit is mask and LSB 32 bit is offset. */
122 [1] = GENMASK_ULL(63, 32), /* MSB 32 bit is mask and LSB 32 bit is offset. */
[all …]
A Dcgx.h25 #define CMR_P2X_SEL_MASK GENMASK_ULL(61, 59)
47 #define CGX_DMAC_CAM_ENTRY_LMACID GENMASK_ULL(50, 49)
49 #define CGX_RX_DMAC_ADR_MASK GENMASK_ULL(47, 0)
54 #define CGX_CONST_RXFIFO_SIZE GENMASK_ULL(55, 32)
55 #define CGX_CONST_MAX_LMACS GENMASK_ULL(31, 24)
81 #define CGX_PFC_CLASS_MASK GENMASK_ULL(47, 32)
/linux-6.3-rc2/drivers/platform/mellanox/
A Dmlxbf-tmfifo-regs.h18 #define MLXBF_TMFIFO_TX_STS__COUNT_RMASK GENMASK_ULL(8, 0)
19 #define MLXBF_TMFIFO_TX_STS__COUNT_MASK GENMASK_ULL(8, 0)
25 #define MLXBF_TMFIFO_TX_CTL__LWM_RMASK GENMASK_ULL(7, 0)
26 #define MLXBF_TMFIFO_TX_CTL__LWM_MASK GENMASK_ULL(7, 0)
30 #define MLXBF_TMFIFO_TX_CTL__HWM_RMASK GENMASK_ULL(7, 0)
31 #define MLXBF_TMFIFO_TX_CTL__HWM_MASK GENMASK_ULL(15, 8)
43 #define MLXBF_TMFIFO_RX_STS__COUNT_RMASK GENMASK_ULL(8, 0)
50 #define MLXBF_TMFIFO_RX_CTL__LWM_RMASK GENMASK_ULL(7, 0)
51 #define MLXBF_TMFIFO_RX_CTL__LWM_MASK GENMASK_ULL(7, 0)
55 #define MLXBF_TMFIFO_RX_CTL__HWM_RMASK GENMASK_ULL(7, 0)
[all …]
/linux-6.3-rc2/drivers/mmc/host/
A Dcavium.h133 #define MIO_EMM_CMD_BUS_ID GENMASK_ULL(61, 60)
136 #define MIO_EMM_CMD_OFFSET GENMASK_ULL(54, 49)
137 #define MIO_EMM_CMD_CTYPE_XOR GENMASK_ULL(42, 41)
139 #define MIO_EMM_CMD_IDX GENMASK_ULL(37, 32)
140 #define MIO_EMM_CMD_ARG GENMASK_ULL(31, 0)
143 #define MIO_EMM_DMA_BUS_ID GENMASK_ULL(61, 60)
147 #define MIO_EMM_DMA_THRES GENMASK_ULL(56, 51)
152 #define MIO_EMM_DMA_CARD_ADDR GENMASK_ULL(31, 0)
161 #define MIO_EMM_DMA_CFG_SIZE GENMASK_ULL(55, 36)
162 #define MIO_EMM_DMA_CFG_ADR GENMASK_ULL(35, 0)
[all …]
/linux-6.3-rc2/tools/perf/util/arm-spe-decoder/
A Darm-spe-pkt-decoder.h44 #define SPE_HEADER0_MASK1 (GENMASK_ULL(7, 6) | GENMASK_ULL(3, 0))
48 #define SPE_HEADER0_MASK2 GENMASK_ULL(7, 2)
54 #define SPE_HEADER0_MASK3 GENMASK_ULL(7, 3)
59 #define SPE_HDR_SHORT_INDEX(h) ((h) & GENMASK_ULL(2, 0))
72 #define SPE_ADDR_PKT_ADDR_GET_BYTES_0_6(v) ((v) & GENMASK_ULL(55, 0))
76 #define SPE_ADDR_PKT_GET_EL(v) (((v) & GENMASK_ULL(62, 61)) >> 61)
78 #define SPE_ADDR_PKT_GET_PAT(v) (((v) & GENMASK_ULL(59, 56)) >> 56)
86 #define SPE_CTX_PKT_HDR_INDEX(h) ((h) & GENMASK_ULL(1, 0))
112 #define SPE_OP_PKT_HDR_CLASS(h) ((h) & GENMASK_ULL(1, 0))
121 #define SPE_OP_PKT_LDST_SUBCLASS_GET(v) ((v) & GENMASK_ULL(7, 1))
[all …]
/linux-6.3-rc2/drivers/fpga/
A Ddfl.h71 #define DFH_ID GENMASK_ULL(11, 0) /* Feature ID */
74 #define DFH_REVISION GENMASK_ULL(15, 12) /* Feature revision */
77 #define DFH_VERSION GENMASK_ULL(59, 52) /* DFH version */
78 #define DFH_TYPE GENMASK_ULL(63, 60) /* Feature type */
115 #define DFHv1_PARAM_MSI_X_NUMV GENMASK_ULL(63, 32)
116 #define DFHv1_PARAM_MSI_X_STARTV GENMASK_ULL(31, 0)
139 #define FME_CAP_NUM_PORTS GENMASK_ULL(19, 17) /* Number of ports */
142 #define FME_CAP_CACHE_ASSOC GENMASK_ULL(47, 44) /* Associativity */
146 #define FME_PORT_OFST_DFH_OFST GENMASK_ULL(23, 0)
148 #define FME_PORT_OFST_BAR_ID GENMASK_ULL(34, 32)
[all …]
/linux-6.3-rc2/drivers/infiniband/hw/erdma/
A Derdma_hw.h103 #define ERDMA_CQDB_IDX_MASK GENMASK_ULL(63, 56)
104 #define ERDMA_CQDB_CQN_MASK GENMASK_ULL(55, 32)
107 #define ERDMA_CQDB_CMDSN_MASK GENMASK_ULL(29, 28)
108 #define ERDMA_CQDB_CI_MASK GENMASK_ULL(23, 0)
111 #define ERDMA_EQDB_CI_MASK GENMASK_ULL(23, 0)
163 #define ERDMA_CMD_HDR_SUB_MOD_MASK GENMASK_ULL(25, 24)
164 #define ERDMA_CMD_HDR_OPCODE_MASK GENMASK_ULL(23, 16)
375 #define ERDMA_SQE_HDR_QPN_MASK GENMASK_ULL(51, 32)
376 #define ERDMA_SQE_HDR_OPCODE_MASK GENMASK_ULL(31, 27)
448 #define ERDMA_CEQE_HDR_PI_MASK GENMASK_ULL(55, 32)
[all …]
/linux-6.3-rc2/drivers/iommu/intel/
A Dcap_audit.h18 #define CAP_MAMV_MASK GENMASK_ULL(53, 48)
19 #define CAP_NFR_MASK GENMASK_ULL(47, 40)
21 #define CAP_SLLPS_MASK GENMASK_ULL(37, 34)
22 #define CAP_FRO_MASK GENMASK_ULL(33, 24)
24 #define CAP_MGAW_MASK GENMASK_ULL(21, 16)
25 #define CAP_SAGAW_MASK GENMASK_ULL(12, 8)
31 #define CAP_NDOMS_MASK GENMASK_ULL(2, 0)
46 #define ECAP_PSS_MASK GENMASK_ULL(39, 35)
54 #define ECAP_MHMV_MASK GENMASK_ULL(23, 20)
55 #define ECAP_IRO_MASK GENMASK_ULL(17, 8)
/linux-6.3-rc2/lib/
A Dtest_bits.c29 KUNIT_EXPECT_EQ(test, 1ull, GENMASK_ULL(0, 0)); in genmask_ull_test()
30 KUNIT_EXPECT_EQ(test, 3ull, GENMASK_ULL(1, 0)); in genmask_ull_test()
31 KUNIT_EXPECT_EQ(test, 0x000000ffffe00000ull, GENMASK_ULL(39, 21)); in genmask_ull_test()
32 KUNIT_EXPECT_EQ(test, 0xffffffffffffffffull, GENMASK_ULL(63, 0)); in genmask_ull_test()
36 GENMASK_ULL(0, 1); in genmask_ull_test()
37 GENMASK_ULL(0, 10); in genmask_ull_test()
38 GENMASK_ULL(9, 10); in genmask_ull_test()
/linux-6.3-rc2/include/linux/irqchip/
A Darm-gic-v3.h249 #define GICR_TYPER_AFFINITY GENMASK_ULL(63, 32)
251 #define GICR_INVLPIR_INTID GENMASK_ULL(31, 0)
252 #define GICR_INVLPIR_VPEID GENMASK_ULL(47, 32)
253 #define GICR_INVLPIR_V GENMASK_ULL(63, 63)
304 #define GICR_VPROPBASER_4_1_ADDR GENMASK_ULL(51, 12)
305 #define GICR_VPROPBASER_4_1_SIZE GENMASK_ULL(6, 0)
384 #define GITS_SGIR_VPEID GENMASK_ULL(47, 32)
385 #define GITS_SGIR_VINTID GENMASK_ULL(3, 0)
396 #define GITS_TYPER_ITT_ENTRY_SIZE GENMASK_ULL(7, 4)
399 #define GITS_TYPER_DEVBITS GENMASK_ULL(17, 13)
[all …]
/linux-6.3-rc2/drivers/net/wireless/realtek/rtw89/
A Dphy.h31 #define RA_MASK_CCK_RATES GENMASK_ULL(3, 0)
32 #define RA_MASK_OFDM_RATES GENMASK_ULL(11, 4)
35 #define RA_MASK_HT_1SS_RATES GENMASK_ULL(19, 12)
36 #define RA_MASK_HT_2SS_RATES GENMASK_ULL(31, 24)
37 #define RA_MASK_HT_3SS_RATES GENMASK_ULL(43, 36)
38 #define RA_MASK_HT_4SS_RATES GENMASK_ULL(55, 48)
39 #define RA_MASK_HT_RATES GENMASK_ULL(55, 12)
44 #define RA_MASK_VHT_RATES GENMASK_ULL(57, 12)
45 #define RA_MASK_HE_1SS_RATES GENMASK_ULL(23, 12)
46 #define RA_MASK_HE_2SS_RATES GENMASK_ULL(35, 24)
[all …]
/linux-6.3-rc2/drivers/accel/ivpu/
A Divpu_mmu.c96 #define IVPU_MMU_EVT_OP_MASK GENMASK_ULL(7, 0)
126 #define IVPU_MMU_CMDQ_OP GENMASK_ULL(7, 0)
129 #define IVPU_MMU_CD_0_TCR_TG0 GENMASK_ULL(7, 6)
144 #define IVPU_MMU_CD_0_ASID GENMASK_ULL(63, 48)
149 #define IVPU_MMU_STE_0_S1FMT GENMASK_ULL(5, 4)
153 #define IVPU_MMU_STE_0_CFG GENMASK_ULL(3, 1)
158 #define IVPU_MMU_STE_1_CONT GENMASK_ULL(16, 13)
170 #define IVPU_MMU_STE_1_S1CIR GENMASK_ULL(3, 2)
171 #define IVPU_MMU_STE_1_S1COR GENMASK_ULL(5, 4)
172 #define IVPU_MMU_STE_1_S1CSH GENMASK_ULL(7, 6)
[all …]
/linux-6.3-rc2/arch/x86/include/asm/
A Dsev-common.h64 (((u64)((v) & GENMASK_ULL(51, 0)) << 12) | \
71 (((u64)(v) & GENMASK_ULL(63, 12)) >> 12)
90 ((u64)((gfn) & GENMASK_ULL(39, 0)) << 12) | \
97 (((u64)(val) & GENMASK_ULL(63, 32)) >> 32)
104 (((u64)(v) & GENMASK_ULL(63, 12)) >> 12)
/linux-6.3-rc2/arch/arm64/kvm/vgic/
A Dvgic.h73 #define KVM_ITS_CTE_ICID_MASK GENMASK_ULL(15, 0)
76 #define KVM_ITS_ITE_PINTID_MASK GENMASK_ULL(47, 16)
77 #define KVM_ITS_ITE_ICID_MASK GENMASK_ULL(15, 0)
81 #define KVM_ITS_DTE_NEXT_MASK GENMASK_ULL(62, 49)
83 #define KVM_ITS_DTE_ITTADDR_MASK GENMASK_ULL(48, 5)
84 #define KVM_ITS_DTE_SIZE_MASK GENMASK_ULL(4, 0)
87 #define KVM_ITS_L1E_ADDR_MASK GENMASK_ULL(51, 16)
89 #define KVM_VGIC_V3_RDIST_INDEX_MASK GENMASK_ULL(11, 0)
90 #define KVM_VGIC_V3_RDIST_FLAGS_MASK GENMASK_ULL(15, 12)
92 #define KVM_VGIC_V3_RDIST_BASE_MASK GENMASK_ULL(51, 16)
[all …]
/linux-6.3-rc2/drivers/firmware/efi/
A Dcper-x86.c13 #define VALID_PROC_ERR_INFO_NUM(bits) (((bits) & GENMASK_ULL(7, 2)) >> 2)
14 #define VALID_PROC_CXT_INFO_NUM(bits) (((bits) & GENMASK_ULL(13, 8)) >> 8)
48 #define CHECK_VALID_BITS(check) (((check) & GENMASK_ULL(15, 0)))
49 #define CHECK_TRANS_TYPE(check) (((check) & GENMASK_ULL(17, 16)) >> 16)
50 #define CHECK_OPERATION(check) (((check) & GENMASK_ULL(21, 18)) >> 18)
51 #define CHECK_LEVEL(check) (((check) & GENMASK_ULL(24, 22)) >> 22)
58 #define CHECK_BUS_PART_TYPE(check) (((check) & GENMASK_ULL(31, 30)) >> 30)
60 #define CHECK_BUS_ADDR_SPACE(check) (((check) & GENMASK_ULL(34, 33)) >> 33)
69 #define CHECK_MS_ERR_TYPE(check) (((check) & GENMASK_ULL(18, 16)) >> 16)
/linux-6.3-rc2/drivers/gpu/drm/i915/
A Dintel_mchbar_regs.h196 #define PKG_PKG_TDP GENMASK_ULL(14, 0)
197 #define PKG_MIN_PWR GENMASK_ULL(30, 16)
198 #define PKG_MAX_PWR GENMASK_ULL(46, 32)
199 #define PKG_MAX_WIN GENMASK_ULL(54, 48)
200 #define PKG_MAX_WIN_X GENMASK_ULL(54, 53)
201 #define PKG_MAX_WIN_Y GENMASK_ULL(52, 48)
/linux-6.3-rc2/drivers/accel/habanalabs/gaudi2/
A Dgaudi2P.h189 #define HW_CAP_DMMU_MASK GENMASK_ULL(24, 9)
192 #define HW_CAP_EDMA_MASK GENMASK_ULL(34, 27)
194 #define HW_CAP_MME_MASK GENMASK_ULL(38, 35)
196 #define HW_CAP_ROT_MASK GENMASK_ULL(40, 39)
228 #define HW_CAP_DEC_MASK GENMASK_ULL(9, 0)
232 #define HW_CAP_TPC_MASK GENMASK_ULL(24, 0)
236 #define HW_CAP_NIC_MASK GENMASK_ULL(NIC_NUMBER_OF_ENGINES - 1, 0)
238 #define GAUDI2_ARC_PCI_MSB_ADDR(addr) (((addr) & GENMASK_ULL(49, 28)) >> 28)
/linux-6.3-rc2/drivers/spi/
A Dspi-altera-dfl.c32 #define DATA_WIDTH GENMASK_ULL(7, 2)
33 #define NUM_CHIPSELECT GENMASK_ULL(13, 8)
36 #define PERIPHERAL_ID GENMASK_ULL(47, 32)
37 #define SPI_CLK GENMASK_ULL(31, 22)
44 #define INDIRECT_DATA_MASK GENMASK_ULL(31, 0)
/linux-6.3-rc2/include/drm/
A Ddrm_buddy.h29 #define DRM_BUDDY_HEADER_OFFSET GENMASK_ULL(63, 12)
30 #define DRM_BUDDY_HEADER_STATE GENMASK_ULL(11, 10)
35 #define DRM_BUDDY_HEADER_UNUSED GENMASK_ULL(9, 6)
36 #define DRM_BUDDY_HEADER_ORDER GENMASK_ULL(5, 0)

Completed in 78 milliseconds

1234567891011