Searched refs:HAL_SEQ_WCSS_UMAC_CE0_DST_REG (Results 1 – 4 of 4) sorted by relevance
578 s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG + HAL_CE_DST_RING_HP; in ath12k_hal_srng_create_config_qcn9274()580 HAL_SEQ_WCSS_UMAC_CE0_DST_REG; in ath12k_hal_srng_create_config_qcn9274()582 HAL_SEQ_WCSS_UMAC_CE0_DST_REG; in ath12k_hal_srng_create_config_qcn9274()585 s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG + in ath12k_hal_srng_create_config_qcn9274()589 HAL_SEQ_WCSS_UMAC_CE0_DST_REG; in ath12k_hal_srng_create_config_qcn9274()591 HAL_SEQ_WCSS_UMAC_CE0_DST_REG; in ath12k_hal_srng_create_config_qcn9274()1022 HAL_SEQ_WCSS_UMAC_CE0_DST_REG; in ath12k_hal_srng_create_config_wcn7850()1024 HAL_SEQ_WCSS_UMAC_CE0_DST_REG; in ath12k_hal_srng_create_config_wcn7850()1028 s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG + in ath12k_hal_srng_create_config_wcn7850()1032 HAL_SEQ_WCSS_UMAC_CE0_DST_REG; in ath12k_hal_srng_create_config_wcn7850()[all …]
48 #define HAL_SEQ_WCSS_UMAC_CE0_DST_REG 0x01b81000 macro
1233 s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab) + HAL_CE_DST_RING_BASE_LSB + in ath11k_hal_srng_create_config()1235 s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab) + HAL_CE_DST_RING_HP + in ath11k_hal_srng_create_config()1238 HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab); in ath11k_hal_srng_create_config()1240 HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab); in ath11k_hal_srng_create_config()1243 s->reg_start[0] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab) + in ath11k_hal_srng_create_config()1245 s->reg_start[1] = HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab) + HAL_CE_DST_STATUS_RING_HP + in ath11k_hal_srng_create_config()1248 HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab); in ath11k_hal_srng_create_config()1250 HAL_SEQ_WCSS_UMAC_CE0_DST_REG(ab); in ath11k_hal_srng_create_config()
48 #define HAL_SEQ_WCSS_UMAC_CE0_DST_REG(x) \ macro
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