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Searched refs:Halt (Results 1 – 17 of 17) sorted by relevance

/linux-6.3-rc2/Documentation/virt/kvm/
A Dhalt-polling.rst31 Halt Polling Interval
145 - Halt polling essentially presents a trade off between power usage and latency and
150 - Halt polling will only be conducted by the host when no other tasks are runnable on
/linux-6.3-rc2/drivers/char/mwave/
A D3780i.h164 unsigned short Halt:1; /* RW: Halt MSP clock */ member
A D3780i.c407 rBootDomain.Halt = true; in dsp3780I_Reset()
442 rBootDomain.Halt = false; in dsp3780I_Run()
/linux-6.3-rc2/drivers/cpuidle/
A DKconfig75 tristate "Halt poll cpuidle driver"
/linux-6.3-rc2/Documentation/devicetree/bindings/input/
A Diqs62x-keys.yaml78 | 13 | SAR Filter Halt*** | x | | x | | |
A Diqs269a.yaml51 3: Halt (no sensing)
A Diqs626a.yaml46 3: Halt (no sensing)
/linux-6.3-rc2/arch/arc/
A DKconfig176 bool "Enable Halt-on-reset boot mode"
178 In SMP configuration cores can be configured as Halt-on-reset
179 or they could all start at same time. For Halt-on-reset, non
/linux-6.3-rc2/Documentation/devicetree/bindings/remoteproc/
A Dqcom,sc7180-mss-pil.yaml109 Halt registers are used to halt transactions of various sub-components
A Dqcom,msm8916-mss-pil.yaml112 Halt registers are used to halt transactions of various sub-components
A Dqcom,sc7280-mss-pil.yaml109 Halt registers are used to halt transactions of various sub-components
A Dqcom,msm8996-mss-pil.yaml112 Halt registers are used to halt transactions of various sub-components
/linux-6.3-rc2/Documentation/block/
A Dublk.rst125 Halt IO on ``/dev/ublkb*`` and remove the device. When this command returns,
/linux-6.3-rc2/Documentation/admin-guide/device-mapper/
A Ddm-raid.rst335 "idle" Halt the current sync action.
/linux-6.3-rc2/Documentation/s390/
A Dcds.rst448 ccw_device_halt() - Halt I/O Request Processing
/linux-6.3-rc2/Documentation/virt/kvm/x86/
A Dtimekeeping.rst249 bit 7 = Run (0) / Halt (1)
/linux-6.3-rc2/Documentation/admin-guide/
A Dkernel-parameters.txt1845 idle=halt: Halt is forced to be used for CPU idle.
4130 Halt all CPUs after the first oops has been printed for

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