Searched refs:IMX6SLL_CLK_PLL3_USB_OTG (Results 1 – 3 of 3) sorted by relevance
37 #define IMX6SLL_CLK_PLL3_USB_OTG 26 macro
141 hws[IMX6SLL_CLK_PLL3_USB_OTG] = imx_clk_hw_gate("pll3_usb_otg", "pll3_bypass", base + 0x10, 13); in imx6sll_clocks_init()349 clk_set_parent(hws[IMX6SLL_CLK_PERIPH_CLK2_SEL]->clk, hws[IMX6SLL_CLK_PLL3_USB_OTG]->clk); in imx6sll_clocks_init()
535 clocks = <&clks IMX6SLL_CLK_PLL3_USB_OTG>;
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