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Searched refs:IMX8MM_SYS_PLL2_50M (Results 1 – 17 of 17) sorted by relevance

/linux-6.3-rc2/include/dt-bindings/clock/
A Dimx8mm-clock.h66 #define IMX8MM_SYS_PLL2_50M 57 macro
/linux-6.3-rc2/arch/arm64/boot/dts/freescale/
A Dimx8mm-venice-gw71xx.dtsi128 assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>,
A Dimx8mm-tqma8mqml-mba8mx.dts87 assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>,
A Dimx8mm-venice-gw72xx.dtsi150 assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>,
A Dimx8mm-beacon-baseboard.dtsi249 assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>,
A Dimx8mm-venice-gw73xx.dtsi170 assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>,
A Dimx8mm-phyboard-polis-rdk.dts175 assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>,
A Dimx8mm-innocomm-wb15.dtsi216 assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>, <&clk IMX8MM_SYS_PLL2_250M>;
A Dimx8mm-evk.dtsi368 assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>,
A Dimx8mm-venice-gw7903.dts565 assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>,
A Dimx8mm-venice-gw7904.dts626 assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>,
A Dimx8mm-venice-gw7902.dts631 assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>,
A Dimx8mm-data-modul-edm-sbc.dts913 assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>,
A Dimx8mm-venice-gw7901.dts710 assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>,
A Dimx8mm-verdin.dtsi657 assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>,
A Dimx8mm.dtsi1103 <&clk IMX8MM_SYS_PLL2_50M>;
/linux-6.3-rc2/drivers/clk/imx/
A Dclk-imx8mm.c383 hws[IMX8MM_SYS_PLL2_50M] = imx_clk_hw_fixed_factor("sys_pll2_50m", "sys_pll2_out", 1, 20); in imx8mm_clocks_probe()

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