Searched refs:INTEL_ARCH_EVENT_MASK (Results 1 – 4 of 4) sorted by relevance
| /linux-6.3-rc2/arch/x86/events/ |
| A D | perf_event.h | 99 ((config & INTEL_ARCH_EVENT_MASK) >= INTEL_TD_METRIC_RETIRING) && in is_metric_event()
100 ((config & INTEL_ARCH_EVENT_MASK) <= INTEL_TD_METRIC_MAX); in is_metric_event()
437 INTEL_ARCH_EVENT_MASK)
443 EVENT_CONSTRAINT(c, n, INTEL_ARCH_EVENT_MASK)
454 __EVENT_CONSTRAINT(c, n, INTEL_ARCH_EVENT_MASK, \
510 INTEL_ARCH_EVENT_MASK|X86_ALL_EVENT_FLAGS, \
515 INTEL_ARCH_EVENT_MASK|X86_ALL_EVENT_FLAGS, \
522 INTEL_ARCH_EVENT_MASK|X86_ALL_EVENT_FLAGS, \
527 INTEL_ARCH_EVENT_MASK|X86_ALL_EVENT_FLAGS, \
534 INTEL_ARCH_EVENT_MASK|X86_ALL_EVENT_FLAGS, \
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| /linux-6.3-rc2/arch/x86/include/asm/ |
| A D | perf_event.h | 50 #define INTEL_ARCH_EVENT_MASK \ macro
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| /linux-6.3-rc2/arch/x86/events/intel/ |
| A D | core.c | 3183 event->hw.config &= ~INTEL_ARCH_EVENT_MASK; in intel_fixup_er()
3187 event->hw.config &= ~INTEL_ARCH_EVENT_MASK; in intel_fixup_er()
3837 return (event->attr.config & INTEL_ARCH_EVENT_MASK) == X86_CONFIG(.event=0xcd, .umask=0x01); in is_mem_loads_event()
3842 return (event->attr.config & INTEL_ARCH_EVENT_MASK) == X86_CONFIG(.event=0x03, .umask=0x82); in is_mem_loads_aux_event()
3875 if ((event->attr.config & INTEL_ARCH_EVENT_MASK) == INTEL_FIXED_VLBR_EVENT) in intel_pmu_hw_config()
4452 if ((event->hw.config & INTEL_ARCH_EVENT_MASK) == in bdw_limit_period()
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| A D | ds.c | 1205 ((attr->config & INTEL_ARCH_EVENT_MASK) == in pebs_update_adaptive_cfg()
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