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Searched refs:INTEL_INFO (Results 1 – 25 of 32) sorted by relevance

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/linux-6.3-rc2/drivers/gpu/drm/i915/
A Di915_drv.h543 INTEL_INFO(dev_priv)->gt == 1)
590 INTEL_INFO(dev_priv)->gt == 3)
594 INTEL_INFO(dev_priv)->gt == 3)
596 INTEL_INFO(dev_priv)->gt == 1)
609 INTEL_INFO(dev_priv)->gt == 2)
611 INTEL_INFO(dev_priv)->gt == 3)
613 INTEL_INFO(dev_priv)->gt == 4)
615 INTEL_INFO(dev_priv)->gt == 2)
617 INTEL_INFO(dev_priv)->gt == 3)
623 INTEL_INFO(dev_priv)->gt == 2)
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A Di915_driver.c180 if (!INTEL_INFO(i915)->gpu_reset_clobbers_display) { in sanitize_gpu()
374 unsigned int mask_size = INTEL_INFO(i915)->dma_mask_size; in i915_set_dma_info()
693 intel_platform_name(INTEL_INFO(dev_priv)->platform), in i915_welcome_messages()
695 INTEL_INFO(dev_priv)->platform), in i915_welcome_messages()
698 intel_device_info_print(INTEL_INFO(dev_priv), in i915_welcome_messages()
739 memcpy(runtime, &INTEL_INFO(i915)->__runtime, sizeof(*runtime)); in i915_driver_create()
A Di915_getparam.c173 value = INTEL_INFO(i915)->has_coherent_ggtt; in i915_getparam_ioctl()
A Dintel_device_info.c239 const struct intel_device_info *info = INTEL_INFO(i915); in intel_device_info_subplatform_init()
349 INTEL_INFO(i915)->platform == INTEL_METEORLAKE) { in intel_ipver_early_init()
A Di915_debugfs.c69 intel_device_info_print(INTEL_INFO(i915), RUNTIME_INFO(i915), &p); in i915_capabilities()
A Di915_gpu_error.c1969 INTEL_INFO(i915), in capture_gen()
2089 if (INTEL_INFO(i915)->has_gt_uc) { in __i915_gpu_coredump()
/linux-6.3-rc2/drivers/gpu/drm/i915/display/
A Dintel_display_reg_defs.h11 #define DISPLAY_MMIO_BASE(dev_priv) (INTEL_INFO(dev_priv)->display.mmio_offset)
43 #define _MMIO_PIPE2(pipe, reg) _MMIO(INTEL_INFO(dev_priv)->display.pipe_offsets[(pipe)] - \
44 INTEL_INFO(dev_priv)->display.pipe_offsets[PIPE_A] + \
46 #define _MMIO_TRANS2(tran, reg) _MMIO(INTEL_INFO(dev_priv)->display.trans_offsets[(tran)] - \
47 INTEL_INFO(dev_priv)->display.trans_offsets[TRANSCODER_A] + \
49 #define _MMIO_CURSOR2(pipe, reg) _MMIO(INTEL_INFO(dev_priv)->display.cursor_offsets[(pipe)] - \
50 INTEL_INFO(dev_priv)->display.cursor_offsets[PIPE_A] + \
A Dintel_hti.c18 if (INTEL_INFO(i915)->display.has_hti) in intel_hti_init()
A Dintel_color.c1520 return INTEL_INFO(i915)->display.color.gamma_lut_tests; in intel_gamma_lut_tests()
1527 return INTEL_INFO(i915)->display.color.degamma_lut_tests; in intel_degamma_lut_tests()
1538 return INTEL_INFO(i915)->display.color.gamma_lut_size; in intel_gamma_lut_size()
1545 return INTEL_INFO(i915)->display.color.degamma_lut_size; in intel_degamma_lut_size()
2011 INTEL_INFO(i915)->display.color.degamma_lut_size, in glk_assign_luts()
2541 u32 lut_size = INTEL_INFO(dev_priv)->display.color.gamma_lut_size; in i9xx_read_lut_10()
2666 int i, lut_size = INTEL_INFO(i915)->display.color.gamma_lut_size; in chv_read_cgm_gamma()
2730 int i, lut_size = INTEL_INFO(i915)->display.color.gamma_lut_size; in ilk_read_lut_10()
2979 int i, lut_size = INTEL_INFO(i915)->display.color.gamma_lut_size; in icl_read_lut_multi_segment()
3138 gamma_lut_size = INTEL_INFO(i915)->display.color.gamma_lut_size; in intel_color_crtc_init()
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A Dintel_fb_pin.c246 INTEL_INFO(dev_priv)->display.cursor_needs_physical; in intel_plane_pin_fb()
A Dintel_display_power.c1052 u8 slice_mask = INTEL_INFO(dev_priv)->display.dbuf.slice_mask; in gen9_dbuf_slices_update()
1112 unsigned long abox_regs = INTEL_INFO(dev_priv)->display.abox_mask; in icl_mbus_init()
1575 unsigned long abox_mask = INTEL_INFO(dev_priv)->display.abox_mask; in tgl_bw_buddy_init()
A Dintel_display.h115 for_each_if(INTEL_INFO(__dev_priv)->display.dbuf.slice_mask & BIT(__slice))
A Dintel_cursor.c40 if (INTEL_INFO(dev_priv)->display.cursor_needs_physical) in intel_cursor_base()
A Dskl_watermark.c505 return INTEL_INFO(i915)->display.dbuf.size / in intel_dbuf_slice_size()
506 hweight8(INTEL_INFO(i915)->display.dbuf.slice_mask); in intel_dbuf_slice_size()
525 WARN_ON(ddb->end > INTEL_INFO(i915)->display.dbuf.size); in skl_ddb_entry_for_slices()
2494 INTEL_INFO(i915)->display.dbuf.slice_mask, in skl_compute_ddb()
A Dintel_tc.c886 if (!INTEL_INFO(i915)->display.has_modular_fia) in tc_has_modular_fia()
A Dintel_ddi_buf_trans.c1660 MISSING_CASE(INTEL_INFO(i915)->platform); in intel_ddi_buf_trans_init()
/linux-6.3-rc2/drivers/gpu/drm/i915/gt/
A Dgen7_renderclear.c59 switch (INTEL_INFO(i915)->gt) { in batch_get_defaults()
74 switch (INTEL_INFO(i915)->gt) { in batch_get_defaults()
A Dintel_reset.c733 return INTEL_INFO(gt->i915)->has_reset_engine; in intel_has_reset_engine()
904 if (!INTEL_INFO(gt->i915)->gpu_reset_clobbers_display) in __intel_gt_set_wedged()
1014 if (!INTEL_INFO(gt->i915)->gpu_reset_clobbers_display) in __intel_gt_unset_wedged()
1141 if (INTEL_INFO(gt->i915)->gpu_reset_clobbers_display) in intel_gt_reset()
1149 if (INTEL_INFO(gt->i915)->gpu_reset_clobbers_display) in intel_gt_reset()
A Dintel_gt_mcr.c38 #define HAS_MSLICE_STEERING(dev_priv) (INTEL_INFO(dev_priv)->has_mslice_steering)
215 MISSING_CASE(INTEL_INFO(i915)->platform); in intel_gt_mcr_init()
A Dintel_gt.c428 if (INTEL_INFO(gt->i915)->has_coherent_ggtt) in intel_gt_flush_ggtt_writes()
897 for (i = 1, gtdef = &INTEL_INFO(i915)->extra_gt_list[i - 1]; in intel_gt_probe_all()
899 i++, gtdef = &INTEL_INFO(i915)->extra_gt_list[i - 1]) { in intel_gt_probe_all()
A Dintel_gt_pm.c185 if (INTEL_INFO(gt->i915)->gpu_reset_clobbers_display) in reset_engines()
A Dintel_sseu.c585 switch (INTEL_INFO(i915)->gt) { in hsw_sseu_info_init()
587 MISSING_CASE(INTEL_INFO(i915)->gt); in hsw_sseu_info_init()
A Dselftest_workarounds.c420 enum intel_platform platform = INTEL_INFO(engine->i915)->platform; in wo_register()
/linux-6.3-rc2/drivers/gpu/drm/i915/pxp/
A Dintel_pxp.c162 if (!IS_ENABLED(CONFIG_DRM_I915_PXP) || !INTEL_INFO(i915)->has_pxp) in find_gt_for_required_protected_content()
/linux-6.3-rc2/drivers/gpu/drm/i915/selftests/
A Dintel_uncore.c197 intel_platform_name(INTEL_INFO(gt->i915)->platform)); in live_forcewake_ops()

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