Searched refs:MASTER_COMM_CMD_REG (Results 1 – 5 of 5) sorted by relevance
| /linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dce/ |
| A D | dce_dmcu.h | 41 SR(MASTER_COMM_CMD_REG), \
63 SR(MASTER_COMM_CMD_REG), \
80 SR(MASTER_COMM_CMD_REG), \
116 DMCU_SF(MASTER_COMM_CMD_REG, \
144 DMCU_SF(MASTER_COMM_CMD_REG, \
162 DMCU_SF(MASTER_COMM_CMD_REG, \
218 uint32_t MASTER_COMM_CMD_REG; member
|
| A D | dce_dmcu.c | 145 REG_UPDATE(MASTER_COMM_CMD_REG, MASTER_COMM_CMD_REG_BYTE0, in dce_dmcu_set_psr_enable()
148 REG_UPDATE(MASTER_COMM_CMD_REG, MASTER_COMM_CMD_REG_BYTE0, in dce_dmcu_set_psr_enable()
271 REG_UPDATE(MASTER_COMM_CMD_REG, in dce_dmcu_setup_psr()
369 REG_UPDATE(MASTER_COMM_CMD_REG, MASTER_COMM_CMD_REG_BYTE0, in dcn10_dmcu_enable_fractional_pwm()
424 REG_UPDATE(MASTER_COMM_CMD_REG, MASTER_COMM_CMD_REG_BYTE0, in dcn10_dmcu_init()
507 REG_UPDATE(MASTER_COMM_CMD_REG, MASTER_COMM_CMD_REG_BYTE0, in dcn10_dmcu_load_iram()
566 REG_UPDATE(MASTER_COMM_CMD_REG, MASTER_COMM_CMD_REG_BYTE0, in dcn10_dmcu_set_psr_enable()
569 REG_UPDATE(MASTER_COMM_CMD_REG, MASTER_COMM_CMD_REG_BYTE0, in dcn10_dmcu_set_psr_enable()
710 REG_UPDATE(MASTER_COMM_CMD_REG, in dcn10_dmcu_setup_psr()
972 REG_UPDATE(MASTER_COMM_CMD_REG, MASTER_COMM_CMD_REG_BYTE0, in dcn10_forward_crc_window()
[all …]
|
| A D | dce_abm.h | 34 SR(MASTER_COMM_CMD_REG), \
151 ABM_SF(MASTER_COMM_CMD_REG, MASTER_COMM_CMD_REG_BYTE0, mask_sh), \
152 ABM_SF(MASTER_COMM_CMD_REG, MASTER_COMM_CMD_REG_BYTE1, mask_sh), \
153 ABM_SF(MASTER_COMM_CMD_REG, MASTER_COMM_CMD_REG_BYTE2, mask_sh)
293 uint32_t MASTER_COMM_CMD_REG; member
|
| A D | dce_abm.c | 73 REG_UPDATE_2(MASTER_COMM_CMD_REG, in dce_abm_set_pipe()
118 REG_UPDATE(MASTER_COMM_CMD_REG, MASTER_COMM_CMD_REG_BYTE0, MCP_BL_SET); in dmcu_set_backlight_level()
210 REG_UPDATE_2(MASTER_COMM_CMD_REG, in dce_abm_set_level()
|
| A D | dce_link_encoder.h | 151 uint32_t MASTER_COMM_CMD_REG; member
|
Completed in 9 milliseconds