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Searched refs:MAX_INSTANCE (Results 1 – 25 of 25) sorted by relevance

/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/
A Drv1_clk_mgr_vbios_smu.c33 #define MAX_INSTANCE 5 macro
41 struct IP_BASE_INSTANCE instance[MAX_INSTANCE];
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/
A Ddcn316_smu.c34 #define MAX_INSTANCE 7 macro
44 struct IP_BASE_INSTANCE instance[MAX_INSTANCE];
A Ddcn316_clk_mgr.c45 #define MAX_INSTANCE 7 macro
55 struct IP_BASE_INSTANCE instance[MAX_INSTANCE];
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/
A Ddcn315_smu.c33 #define MAX_INSTANCE 6 macro
43 struct IP_BASE_INSTANCE instance[MAX_INSTANCE];
/linux-6.3-rc2/drivers/gpu/drm/amd/include/
A Dcyan_skillfish_ip_offset.h24 #define MAX_INSTANCE 6 macro
35 struct IP_BASE_INSTANCE instance[MAX_INSTANCE];
A Dnavi10_ip_offset.h24 #define MAX_INSTANCE 6 macro
33 struct IP_BASE_INSTANCE instance[MAX_INSTANCE];
A Dvega20_ip_offset.h24 #define MAX_INSTANCE 6 macro
35 struct IP_BASE_INSTANCE instance[MAX_INSTANCE];
A Ddimgrey_cavefish_ip_offset.h24 #define MAX_INSTANCE 7 macro
35 struct IP_BASE_INSTANCE instance[MAX_INSTANCE];
A Dnavi12_ip_offset.h24 #define MAX_INSTANCE 7 macro
35 struct IP_BASE_INSTANCE instance[MAX_INSTANCE];
A Dnavi14_ip_offset.h24 #define MAX_INSTANCE 7 macro
35 struct IP_BASE_INSTANCE instance[MAX_INSTANCE];
A Dsienna_cichlid_ip_offset.h24 #define MAX_INSTANCE 7 macro
35 struct IP_BASE_INSTANCE instance[MAX_INSTANCE];
A Dbeige_goby_ip_offset.h25 #define MAX_INSTANCE 7 macro
36 struct IP_BASE_INSTANCE instance[MAX_INSTANCE];
A Dvega10_ip_offset.h24 #define MAX_INSTANCE 5 macro
34 struct IP_BASE_INSTANCE instance[MAX_INSTANCE];
A Drenoir_ip_offset.h24 #define MAX_INSTANCE 7 macro
35 struct IP_BASE_INSTANCE instance[MAX_INSTANCE];
A Dvangogh_ip_offset.h27 #define MAX_INSTANCE 8 macro
38 struct IP_BASE_INSTANCE instance[MAX_INSTANCE];
A Dyellow_carp_offset.h6 #define MAX_INSTANCE 7 macro
17 struct IP_BASE_INSTANCE instance[MAX_INSTANCE];
A Darct_ip_offset.h24 #define MAX_INSTANCE 8 macro
35 struct IP_BASE_INSTANCE instance[MAX_INSTANCE];
A Daldebaran_ip_offset.h24 #define MAX_INSTANCE 7 macro
32 struct IP_BASE_INSTANCE instance[MAX_INSTANCE];
/linux-6.3-rc2/drivers/gpu/drm/amd/amdgpu/
A Ddimgrey_cavefish_reg_init.c34 for (i = 0 ; i < MAX_INSTANCE ; ++i) { in dimgrey_cavefish_reg_base_init()
A Daldebaran_reg_init.c33 for (i = 0 ; i < MAX_INSTANCE ; ++i) { in aldebaran_reg_base_init()
A Darct_reg_init.c33 for (i = 0 ; i < MAX_INSTANCE ; ++i) { in arct_reg_base_init()
A Dvega10_reg_init.c33 for (i = 0 ; i < MAX_INSTANCE ; ++i) { in vega10_reg_base_init()
A Dvega20_reg_init.c33 for (i = 0 ; i < MAX_INSTANCE ; ++i) { in vega20_reg_base_init()
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/
A Ddcn314_clk_mgr.c61 #define MAX_INSTANCE 7 macro
69 struct IP_BASE_INSTANCE instance[MAX_INSTANCE];
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dcn314/
A Ddcn314_resource.c110 #define MAX_INSTANCE 7 macro
125 struct IP_BASE_INSTANCE instance[MAX_INSTANCE];

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