MAX_POST_DIVR_FREQ (reference) in projects: linux-6.3-rc2

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/linux-6.3-rc2/drivers/clk/analogbits/
A D	wrpll-cln28hpc.c	`44 #define MAX_POST_DIVR_FREQ 200000000 macro 86 post_divr_freq > MAX_POST_DIVR_FREQ) { in __wrpll_calc_filter_range() 199 c->init_r = DIV_ROUND_UP_ULL(parent_rate, MAX_POST_DIVR_FREQ); in __wrpll_update_parent_rate()`

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