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Searched refs:MCF_CLK (Results 1 – 25 of 29) sorted by relevance

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/linux-6.3-rc2/arch/m68k/coldfire/
A Dm5441x.c21 DEFINE_CLK(0, "flexbus", 2, MCF_CLK);
22 DEFINE_CLK(0, "flexcan.0", 8, MCF_CLK);
23 DEFINE_CLK(0, "flexcan.1", 9, MCF_CLK);
26 DEFINE_CLK(0, "edma", 17, MCF_CLK);
27 DEFINE_CLK(0, "intc.0", 18, MCF_CLK);
28 DEFINE_CLK(0, "intc.1", 19, MCF_CLK);
29 DEFINE_CLK(0, "intc.2", 20, MCF_CLK);
53 DEFINE_CLK(0, "pll.0", 48, MCF_CLK);
78 DEFINE_CLK(2, "ipg.0", 0, MCF_CLK);
79 DEFINE_CLK(2, "ahb.0", 1, MCF_CLK);
[all …]
A Dm520x.c28 DEFINE_CLK(0, "flexbus", 2, MCF_CLK);
29 DEFINE_CLK(0, "fec.0", 12, MCF_CLK);
30 DEFINE_CLK(0, "edma", 17, MCF_CLK);
31 DEFINE_CLK(0, "intc.0", 18, MCF_CLK);
32 DEFINE_CLK(0, "iack.0", 21, MCF_CLK);
38 DEFINE_CLK(0, "mcftmr.0", 28, MCF_CLK);
39 DEFINE_CLK(0, "mcftmr.1", 29, MCF_CLK);
40 DEFINE_CLK(0, "mcftmr.2", 30, MCF_CLK);
41 DEFINE_CLK(0, "mcftmr.3", 31, MCF_CLK);
47 DEFINE_CLK(0, "pll.0", 36, MCF_CLK);
[all …]
A Dm53xx.c31 DEFINE_CLK(0, "flexbus", 2, MCF_CLK);
32 DEFINE_CLK(0, "mcfcan.0", 8, MCF_CLK);
33 DEFINE_CLK(0, "fec.0", 12, MCF_CLK);
34 DEFINE_CLK(0, "edma", 17, MCF_CLK);
35 DEFINE_CLK(0, "intc.0", 18, MCF_CLK);
36 DEFINE_CLK(0, "intc.1", 19, MCF_CLK);
37 DEFINE_CLK(0, "iack.0", 21, MCF_CLK);
62 DEFINE_CLK(0, "ssi.0", 47, MCF_CLK);
63 DEFINE_CLK(0, "pll.0", 48, MCF_CLK);
65 DEFINE_CLK(1, "mdha.0", 32, MCF_CLK);
[all …]
A Dm5407.c25 DEFINE_CLK(pll, "pll.0", MCF_CLK);
A Dm5206.c25 DEFINE_CLK(pll, "pll.0", MCF_CLK);
A Dm5307.c34 DEFINE_CLK(pll, "pll.0", MCF_CLK);
A Ddma_timer.c30 #define DMA_FREQ ((MCF_CLK / 2) / 16)
A Dm523x.c28 DEFINE_CLK(pll, "pll.0", MCF_CLK);
A Dm525x.c25 DEFINE_CLK(pll, "pll.0", MCF_CLK);
A Dm54xx.c34 DEFINE_CLK(pll, "pll.0", MCF_CLK);
A Dm5272.c36 DEFINE_CLK(pll, "pll.0", MCF_CLK);
A Dm528x.c30 DEFINE_CLK(pll, "pll.0", MCF_CLK);
A Dm5249.c25 DEFINE_CLK(pll, "pll.0", MCF_CLK);
A Dm527x.c29 DEFINE_CLK(pll, "pll.0", MCF_CLK);
A Dpit.c34 #define FREQ ((MCF_CLK / 2) / 64)
/linux-6.3-rc2/arch/m68k/include/asm/
A Dcoldfire.h24 #define MCF_CLK CONFIG_CLOCK_FREQ macro
A Dtimex.h16 #define CLOCK_TICK_RATE MCF_CLK
A Dm54xxsim.h11 #define MCF_BUSCLK (MCF_CLK / 2)
A Dm520xsim.h17 #define MCF_BUSCLK (MCF_CLK / 2)
A Dm5272sim.h18 #define MCF_BUSCLK MCF_CLK
A Dm5407sim.h20 #define MCF_BUSCLK (MCF_CLK / 2)
A Dm5206sim.h18 #define MCF_BUSCLK MCF_CLK
A Dm5307sim.h20 #define MCF_BUSCLK (MCF_CLK / 2)
A Dm523xsim.h17 #define MCF_BUSCLK (MCF_CLK / 2)
A Dm525xsim.h23 #define MCF_BUSCLK (MCF_CLK / 2)

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