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Searched refs:MCF_IRQ_I2C0 (Results 1 – 17 of 17) sorted by relevance

/linux-6.3-rc2/arch/m68k/coldfire/
A Dm5407.c45 mcf_mapirq2imr(MCF_IRQ_I2C0, MCFINTC_I2C); in m5407_i2c_init()
A Dm5206.c45 mcf_mapirq2imr(MCF_IRQ_I2C0, MCFINTC_I2C); in m5206_i2c_init()
A Dm5307.c54 mcf_mapirq2imr(MCF_IRQ_I2C0, MCFINTC_I2C); in m5307_i2c_init()
A Dm525x.c66 mcf_mapirq2imr(MCF_IRQ_I2C0, MCFINTC_I2C); in m525x_i2c_init()
A Dm5249.c94 mcf_mapirq2imr(MCF_IRQ_I2C0, MCFINTC_I2C); in m5249_i2c_init()
A Ddevice.c350 .start = MCF_IRQ_I2C0,
351 .end = MCF_IRQ_I2C0,
/linux-6.3-rc2/arch/m68k/include/asm/
A Dm54xxsim.h49 #define MCF_IRQ_I2C0 (MCFINT_VECBASE + 40) macro
A Dm520xsim.h72 #define MCF_IRQ_I2C0 (MCFINT_VECBASE + MCFINT_I2C0) macro
A Dm5407sim.h142 #define MCF_IRQ_I2C0 29 /* I2C, Level 5 */ macro
A Dm5206sim.h114 #define MCF_IRQ_I2C0 29 /* I2C, Level 5 */ macro
A Dm5307sim.h178 #define MCF_IRQ_I2C0 29 /* I2C, Level 5 */ macro
A Dm523xsim.h58 #define MCF_IRQ_I2C0 (MCFINT_VECBASE + MCFINT_I2C0) macro
A Dm525xsim.h160 #define MCF_IRQ_I2C0 29 macro
A Dm528xsim.h58 #define MCF_IRQ_I2C0 (MCFINT_VECBASE + MCFINT_I2C0) macro
A Dm5441xsim.h182 #define MCF_IRQ_I2C0 (MCFINT0_VECBASE + MCFINT0_I2C0) macro
A Dm527xsim.h66 #define MCF_IRQ_I2C0 (MCFINT_VECBASE + MCFINT_I2C0) macro
A Dm53xxsim.h37 #define MCF_IRQ_I2C0 (MCFINT_VECBASE + MCFINT_I2C0) macro

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