Home
last modified time | relevance | path

Searched refs:MCR (Results 1 – 24 of 24) sorted by relevance

/linux-6.3-rc2/drivers/tty/
A Damiserial.c492 info->MCR = 0; in startup()
495 rtsdtr_ctrl(info->MCR); in startup()
555 rtsdtr_ctrl(info->MCR); in shutdown()
860 info->MCR &= ~SER_RTS; in rs_throttle()
863 rtsdtr_ctrl(info->MCR); in rs_throttle()
882 info->MCR |= SER_RTS; in rs_unthrottle()
884 rtsdtr_ctrl(info->MCR); in rs_unthrottle()
1021 control = info->MCR; in rs_tiocmget()
1043 info->MCR |= SER_RTS; in rs_tiocmset()
1045 info->MCR |= SER_DTR; in rs_tiocmset()
[all …]
A Dmxser.c516 info->MCR |= UART_MCR_DTR; in mxser_set_baud()
519 info->MCR &= ~UART_MCR_DTR; in mxser_set_baud()
628 info->MCR &= ~UART_MCR_AFE; in mxser_change_speed()
633 info->MCR |= UART_MCR_AFE; in mxser_change_speed()
1108 control = info->MCR; in mxser_tiocmget()
1132 info->MCR |= UART_MCR_RTS; in mxser_tiocmset()
1134 info->MCR |= UART_MCR_DTR; in mxser_tiocmset()
1137 info->MCR &= ~UART_MCR_RTS; in mxser_tiocmset()
1139 info->MCR &= ~UART_MCR_DTR; in mxser_tiocmset()
1293 info->MCR &= ~UART_MCR_RTS; in mxser_throttle()
[all …]
/linux-6.3-rc2/arch/sh/boards/mach-hp6xx/
A Dpm.c29 #define MCR 0xffffff68 macro
64 mcr = __raw_readw(MCR); in pm_enter()
65 __raw_writew(mcr & ~MCR_RFSH, MCR); in pm_enter()
76 __raw_writew(mcr | MCR_RFSH | MCR_RMODE, MCR); in pm_enter()
/linux-6.3-rc2/drivers/atm/
A Didt77105.c135 PUT( walk->old_mcr ,MCR); in idt77105_restart_timer_func()
231 PRIV(dev)->old_mcr = GET(MCR); in idt77105_int()
237 ) & ~IDT77105_MCR_EIP, MCR); in idt77105_int()
296 PRIV(dev)->old_mcr = GET(MCR); in idt77105_start()
299 PUT(PRIV(dev)->old_mcr, MCR); in idt77105_start()
328 PUT( GET(MCR) & ~IDT77105_MCR_EIP, MCR ); in idt77105_stop()
A Diphase.h172 #define MCR 0 macro
/linux-6.3-rc2/drivers/net/hamradio/
A Dbaycom_ser_fdx.c98 #define MCR(iobase) (iobase+4) macro
290 outb(0x0e | (!!bc->modem.ser12.tx_bit), MCR(dev->base_addr)); in ser12_interrupt()
292 outb(0x0d, MCR(dev->base_addr)); /* transmitter off */ in ser12_interrupt()
348 b1 = inb(MCR(iobase)); in ser12_check_uart()
349 outb(b1 | 0x10, MCR(iobase)); /* loopback mode */ in ser12_check_uart()
351 outb(0x1a, MCR(iobase)); in ser12_check_uart()
353 outb(b1, MCR(iobase)); /* restore old values */ in ser12_check_uart()
407 outb(0x0d, MCR(dev->base_addr)); in ser12_open()
450 outb(1, MCR(dev->base_addr)); in ser12_close()
A Dbaycom_ser_hdx.c84 #define MCR(iobase) (iobase+4) macro
193 outb(0x0e | (!!bc->modem.ser12.tx_bit), MCR(dev->base_addr)); in ser12_tx()
339 outb(0x0d, MCR(dev->base_addr)); /* transmitter off */ in ser12_rx()
430 b1 = inb(MCR(iobase)); in ser12_check_uart()
431 outb(b1 | 0x10, MCR(iobase)); /* loopback mode */ in ser12_check_uart()
433 outb(0x1a, MCR(iobase)); in ser12_check_uart()
435 outb(b1, MCR(iobase)); /* restore old values */ in ser12_check_uart()
475 outb(0x0d, MCR(dev->base_addr)); in ser12_open()
509 outb(1, MCR(dev->base_addr)); in ser12_close()
A Dyam.c155 #define MCR(iobase) (iobase+4) macro
302 outb(MCR_OUT1 | MCR_OUT2, MCR(iobase)); in fpga_reset()
321 outb(bit | MCR_OUT1 | MCR_OUT2, MCR(iobase)); in fpga_write()
470 outb(PTT_OFF, MCR(dev->base_addr)); in yam_set_uart()
501 b1 = inb(MCR(iobase)); in yam_check_uart()
502 outb(b1 | 0x10, MCR(iobase)); /* loopback mode */ in yam_check_uart()
504 outb(0x1a, MCR(iobase)); in yam_check_uart()
506 outb(b1, MCR(iobase)); /* restore old values */ in yam_check_uart()
572 outb(PTT_ON, MCR(dev->base_addr)); in ptt_on()
577 outb(PTT_OFF, MCR(dev->base_addr)); in ptt_off()
[all …]
/linux-6.3-rc2/arch/x86/boot/
A Dearly_serial_console.c18 #define MCR 4 /* Modem control */ macro
34 outb(0x3, port + MCR); /* DTR + RTS */ in early_serial_init()
/linux-6.3-rc2/drivers/dma/
A Dtxx9dmac.h96 TXX9_DMA_REG32(MCR); /* Master Control Register */
102 u32 MCR; member
A Dtxx9dmac.c651 mcr = dma_readl(ddev, MCR); in txx9dmac_tasklet()
676 dma_readl(ddev, MCR)); in txx9dmac_interrupt()
1077 dma_writel(ddev, MCR, 0); in txx9dmac_off()
1212 dma_writel(ddev, MCR, mcr); in txx9dmac_probe()
1254 dma_writel(ddev, MCR, mcr); in txx9dmac_resume_noirq()
/linux-6.3-rc2/arch/arm/mach-orion5x/
A Dtsx09-common.c38 writel(0x00, UART1_REG(MCR)); in qnap_tsx09_power_off()
A Dterastation_pro2-setup.c281 writel(0x00, UART1_REG(MCR)); in tsp2_power_off()
A Dkurobox_pro-setup.c303 writel(0x00, UART1_REG(MCR)); in kurobox_pro_power_off()
/linux-6.3-rc2/arch/x86/kernel/
A Dearly_printk.c91 #define MCR 4 /* Modem control */ macro
137 serial_out(early_serial_base, MCR, 0x3); /* DTR + RTS */ in early_serial_hw_init()
/linux-6.3-rc2/drivers/usb/serial/
A Dio_16654.h36 #define MCR 4 // Modem Control Register macro
A Dio_edgeport.c1395 status = send_cmd_write_uart_register(edge_port, MCR, in edge_throttle()
1432 send_cmd_write_uart_register(edge_port, MCR, in edge_unthrottle()
1515 send_cmd_write_uart_register(edge_port, MCR, edge_port->shadowMCR); in edge_tiocmset()
2285 (regNum == MCR) ? "MCR" : "LCR", __func__, regValue); in send_cmd_write_uart_register()
2289 regNum == MCR) { in send_cmd_write_uart_register()
2469 status = send_cmd_write_uart_register(edge_port, MCR, in change_port_settings()
/linux-6.3-rc2/drivers/power/reset/
A Dqnap-poweroff.c66 writel(0x00, UART1_REG(MCR)); in qnap_power_off()
/linux-6.3-rc2/drivers/net/ethernet/smsc/
A Dsmc9194.h93 #define MCR 10 macro
A Dsmc9194.c937 memory_cfg_register = inw( ioaddr + MCR ); in smc_probe()
/linux-6.3-rc2/arch/arm/include/asm/
A Dvfpmacros.h26 MCR\cond p10, 7, \rd, \sysreg, cr0, 0 @ FMXR \sysreg, \rd
/linux-6.3-rc2/Documentation/misc-devices/
A Doxsemi-tornado.rst30 setting bit 4 of the EFR. In that mode setting bit 7 in the MCR enables
/linux-6.3-rc2/Documentation/gpu/
A Di915.rst252 Multicast/Replicated (MCR) Registers
256 :doc: GT Multicast/Replicated (MCR) Register Support
/linux-6.3-rc2/arch/x86/
A DKconfig694 Select this option to expose the IOSF sideband access registers (MCR,

Completed in 70 milliseconds