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/linux-6.3-rc2/Documentation/devicetree/bindings/dma/
A Dimg-mdc-dma.txt1 * IMG Multi-threaded DMA Controller (MDC)
5 - reg: Must contain the base address and length of the MDC registers.
10 - sys: MDC system interface clock.
/linux-6.3-rc2/arch/powerpc/boot/dts/
A Dkmeter1.dts149 0 2 1 0 1 0 /* MDC */
175 0 2 1 0 1 0 /* MDC */
201 0 2 1 0 1 0 /* MDC */
221 0 2 1 0 1 0 /* MDC */
239 0 2 1 0 1 0 /* MDC */
257 0 2 1 0 1 0 /* MDC */
275 0 2 1 0 1 0 /* MDC */
/linux-6.3-rc2/arch/arm/boot/dts/
A Dstm32mp151a-prtt1l.dtsi40 /* DP83TD510E PHYs have max MDC rate of 1.75MHz. Since we can't reduce
41 * stmmac MDC clock without reducing system bus rate, we need to use
A Dgemini-sq201.dts58 /* Uses MDC and MDIO */
59 gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */
A Dgemini-ns2502.dts34 gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */
A Dgemini-sl93512r.dts73 /* Uses MDC and MDIO */
74 gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */
A Dgemini-ssi1328.dts34 gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */
A Dgemini-dlink-dns-313.dts154 /* Uses MDC and MDIO */
155 gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */
A Dgemini-rut1xx.dts61 gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */
A Dgemini-wbd111.dts73 gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */
A Dgemini-wbd222.dts72 gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */
A Dam335x-netcan-plus-1xx.dts92 "MDC",
A Dlan966x-kontron-kswitch-d10-mmt.dtsi57 /* MDC, MDIO */
A Dam335x-baltos-ir2110.dts88 "MDC",
A Dlan966x-pcb8290.dts30 /* MDC, MDIO */
A Dam335x-netcom-plus-2xx.dts100 "MDC",
A Dgemini-nas4220b.dts67 gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */
A Dam335x-netcom-plus-8xx.dts132 "MDC",
A Dbcm47094-asus-rt-ac88u.dts102 /* 7 = MDIO (has input reads), 6 = MDC (clock, output only) */
/linux-6.3-rc2/Documentation/devicetree/bindings/net/
A Dmdio-gpio.yaml32 - description: MDC
A Dfsl-fman.txt269 from which the MDC frequency is derived.
274 Definition: Specifies the external MDC frequency, in Hertz, to
302 become corrupt unless it is read within 16 MDC cycles
/linux-6.3-rc2/drivers/net/ethernet/sis/
A Dsis900.h61 MDC = 0x00000040, MDDIR = 0x00000020, MDIO = 0x00000010, /* 7016 specific */ enumerator
A Dsis900.c874 sw32(mear, MDIO | MDDIR | MDC); in mdio_idle()
886 sw32(mear, MDDIR | MDIO | MDC); in mdio_reset()
918 sw32(mear, dataval | MDC); in mdio_read()
927 sw32(mear, MDC); in mdio_read()
964 sw8(mear, dataval | MDC); in mdio_write()
975 sw32(mear, dataval | MDC); in mdio_write()
984 sw8(mear, MDC); in mdio_write()
/linux-6.3-rc2/Documentation/devicetree/bindings/net/dsa/
A Drealtek.yaml51 description: GPIO line for the MDC clock line.
148 /* 22 = MDIO (has input reads), 21 = MDC (clock, output only) */
/linux-6.3-rc2/Documentation/devicetree/bindings/pinctrl/
A Dmediatek,mt7622-pinctrl.yaml266 I2S3_OUT, I2S4_OUT, GPIO_B, MDC, MDIO, G2_TXD0, G2_TXD1,
371 pins = "MDC";

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