Home
last modified time | relevance | path

Searched refs:MDIO (Results 1 – 25 of 182) sorted by relevance

12345678

/linux-6.3-rc2/drivers/net/mdio/
A DKconfig3 # MDIO Layer Configuration
7 tristate "MDIO bus device drivers"
9 MDIO devices and driver infrastructure code.
27 FWNODE MDIO bus (Ethernet PHY) accessors
42 ACPI MDIO bus (Ethernet PHY) accessors
65 tristate "ASPEED MDIO bus controller"
78 tristate "Bitbanged MDIO buses"
112 Supports GPIO lib-based MDIO busses.
135 tristate "Marvell USB to MDIO Adapter"
186 tristate "ThunderX SOCs MDIO buses"
[all …]
/linux-6.3-rc2/Documentation/ABI/testing/
A Dsysfs-bus-mdio8 MDIO bus address statistics.
16 Total number of transfers for this MDIO bus.
24 Total number of transfer errors for this MDIO bus.
32 Total number of write transactions for this MDIO bus.
40 Total number of read transactions for this MDIO bus.
48 Total number of transfers for this MDIO bus address.
56 Total number of transfer errors for this MDIO bus address.
64 Total number of write transactions for this MDIO bus address.
72 Total number of read transactions for this MDIO bus address.
/linux-6.3-rc2/Documentation/firmware-guide/acpi/dsd/
A Dphy.rst4 MDIO bus and PHYs in ACPI
7 The PHYs on an MDIO bus [phy] are probed and registered using
11 on the MDIO bus have to be referenced.
24 the PHY that is registered on an MDIO bus. This is mandatory for
25 network interfaces that have PHYs connected to MAC via MDIO bus.
27 During the MDIO bus driver initialization, PHYs on this bus are probed
44 have to be retrieved from the MDIO bus. For this, the MAC driver needs
70 DSDT entry for MDIO node
73 The MDIO bus has an SoC component (MDIO controller) and a platform
74 component (PHYs on the MDIO bus).
[all …]
/linux-6.3-rc2/Documentation/devicetree/bindings/net/
A Dmdio.yaml7 title: MDIO Bus Common Properties
15 These are generic properties that can apply to any MDIO bus. Any
16 MDIO bus must have a list of child nodes, one per device on the
34 lines of all devices on that MDIO bus.
38 RESET pulse width in microseconds. It applies to all MDIO devices
44 Delay after reset deassert in microseconds. It applies to all MDIO
51 Desired MDIO bus clock frequency in Hz. Values greater than IEEE 802.3
75 If set, indicates the MDIO device does not correctly release
77 MDIO transaction.
82 The GPIO phandle and specifier for the MDIO reset signal.
A Dcavium-mdio.txt1 * System Management Interface (SMI) / MDIO
11 - reg: The base address of the MDIO bus controller register bank.
15 - #size-cells: Must be <0>. MDIO addresses have no size component.
17 Typically an MDIO bus might have several children.
33 * System Management Interface (SMI) / MDIO Nexus
48 - ranges: As needed for mapping of the MDIO bus device registers.
50 - assigned-addresses: As needed for mapping of the MDIO bus device registers.
A Dbrcm,unimac-mdio.yaml7 title: Broadcom UniMAC MDIO bus controller
31 - description: indirect accesses to larger than 16-bits MDIO transactions
42 Interrupt shared with the Ethernet MAC or Ethernet switch this MDIO
58 description: A reference to the clock supplying the MDIO bus controller
62 The MDIO bus clock that must be output by the MDIO bus hardware, if
A Dhisilicon-hns-mdio.txt1 Hisilicon MDIO bus controller
10 - reg: The base address of the MDIO bus controller register bank.
12 - #size-cells: Must be <0>. MDIO addresses have no size component.
14 Typically an MDIO bus might have several children.
A Dbrcm,mdio-mux-iproc.yaml7 title: MDIO bus multiplexer found in Broadcom iProc based SoCs.
13 This MDIO bus multiplexer defines buses that could be internal as well as
14 external to SoCs and could accept MDIO transaction compatible to C-22 or
16 properties as well to generate desired MDIO transaction on appropriate bus.
30 description: core clock driving the MDIO block
A Dmdio-mux.yaml7 title: Common MDIO bus multiplexer/switch properties.
13 An MDIO bus multiplexer/switch will have several child busses that are
14 numbered uniquely in a device dependent manner. The nodes for an MDIO
21 The phandle of the MDIO bus that this multiplexer's master-side port is
A Daspeed,ast2600-mdio.yaml7 title: ASPEED AST2600 MDIO Controller
13 The ASPEED AST2600 MDIO controller is the third iteration of ASPEED's MDIO
26 description: The register range of the MDIO controller instance
A Dfsl-fman.txt10 - FMan MDIO Node
243 FMan MDIO Node
247 The MDIO is a bus to which the PHY devices are connected.
285 Usage: required for external MDIO
290 Usage: required for internal MDIO
295 MDIO are different. Must be included for internal MDIO.
304 MDIO read operation.
311 set when reading internal PCS registers. MDIO reads to
329 Example for FMan v2 external MDIO:
337 Example for FMan v2 internal MDIO:
[all …]
A Dapm-xgene-mdio.txt1 APM X-Gene SoC MDIO node
3 MDIO node is defined to describe on-chip MDIO controller.
A Dbrcm,bcm6368-mdio-mux.yaml7 title: Broadcom BCM6368 MDIO bus multiplexer
13 This MDIO bus multiplexer defines buses that could be internal as well as
15 properties as well to generate desired MDIO transaction on appropriate bus.
A Damlogic,gxl-mdio-mux.yaml7 title: Amlogic GXL MDIO bus multiplexer
13 This is a special case of a MDIO bus multiplexer. It allows to choose between
15 MDIO bus on the Amlogic GXL SoC family.
A Dti,davinci-mdio.yaml7 title: TI SoC Davinci/Keystone2 MDIO Controller
13 TI SoC Davinci/Keystone2 MDIO Controller
39 description: MDIO Bus frequency
A Dnixge.txt11 "ctrl": MDIO and PHY control and status region
19 - mdio subnode to indicate presence of MDIO controller
49 Examples (10G generic PHY, no MDIO):
65 Examples (1G generic fixed-link + MDIO):
A Dmdio-mux-multiplexer.yaml7 title: Properties for an MDIO bus multiplexer consumer device
13 This is a special case of MDIO mux when MDIO mux is defined as a consumer
A Dqcom,ipq4019-mdio.yaml7 title: Qualcomm IPQ40xx MDIO Controller
35 the first Address and length of the register set for the MDIO controller.
41 - description: MDIO clock source frequency fixed to 100MHZ
A Damlogic,g12a-mdio-mux.yaml7 title: MDIO bus multiplexer/glue of Amlogic G12a SoC family
10 This is a special case of a MDIO bus multiplexer. It allows to choose between
12 MDIO bus.
A Dfsl-enetc.txt14 1. The ENETC external port is connected to a MDIO configurable phy
16 1.1. Using the local ENETC Port MDIO interface
26 - phy-handle : Phandle to a PHY on the MDIO bus.
52 1.2. Using the central MDIO PCIe endpoint device
/linux-6.3-rc2/arch/powerpc/boot/dts/
A Dkmeter1.dts148 0 1 3 0 2 0 /* MDIO */
174 0 1 3 0 2 0 /* MDIO */
200 0 1 3 0 2 0 /* MDIO */
220 0 1 3 0 2 0 /* MDIO */
238 0 1 3 0 2 0 /* MDIO */
256 0 1 3 0 2 0 /* MDIO */
274 0 1 3 0 2 0 /* MDIO */
362 /* Eth-1 (UCC5, MDIO 0x08, RMII) */
378 /* Eth-2 (UCC6, MDIO 0x09, RMII) */
394 /* Eth-3 (UCC7, MDIO 0x0a, RMII) */
[all …]
/linux-6.3-rc2/Documentation/devicetree/bindings/net/dsa/
A Drealtek.yaml18 MDIO or SPI.
21 bit-banged GPIO that while it reuses the MDIO lines MCK and MDIO does
22 not use the MDIO protocol. This binding defines how to specify the
26 The MDIO-connected switches use MDIO protocol to access their registers.
27 The realtek-mdio driver is an MDIO driver and it must be inserted inside
28 an MDIO node.
55 description: GPIO line for the MDIO data line.
148 /* 22 = MDIO (has input reads), 21 = MDC (clock, output only) */
A Dmarvell.txt10 Marvell Switches are MDIO devices. The following properties should be
17 which is at a different MDIO base address in different switch families.
44 - mdio : Container of PHY and devices on the switches MDIO
46 - mdio? : Container of PHYs and devices on the external MDIO
/linux-6.3-rc2/drivers/net/ethernet/freescale/
A DKconfig50 bool "FEC MPC52xx MDIO bus driver"
65 tristate "Freescale PQ MDIO"
68 This driver supports the MDIO bus used by the gianfar and UCC drivers.
71 tristate "Freescale XGMAC MDIO"
76 This driver supports the MDIO bus on the Fman 10G Ethernet MACs, and
/linux-6.3-rc2/drivers/net/dsa/xrs700x/
A DKconfig21 tristate "Arrow XRS7000X series switch in MDIO mode"
25 Enable MDIO support for Arrow SpeedChips XRS7003/7004 gigabit Ethernet

Completed in 29 milliseconds

12345678