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Searched refs:MIPS_CPU_RIXI (Results 1 – 3 of 3) sorted by relevance

/linux-6.3-rc2/arch/mips/include/asm/
A Dcpu.h382 #define MIPS_CPU_RIXI BIT_ULL(23) /* CPU has TLB Read/eXec Inhibit */ macro
A Dcpu-features.h209 #define cpu_has_rixi __isa_ge_or_opt(6, MIPS_CPU_RIXI)
/linux-6.3-rc2/arch/mips/kernel/
A Dcpu-probe.c509 c->options |= MIPS_CPU_RIXI | MIPS_CPU_CTXTC; in decode_config3()
512 c->options |= MIPS_CPU_RIXI; in decode_config3()
1579 c->options |= MIPS_CPU_RIXI; in cpu_probe_broadcom()
1596 c->options |= MIPS_CPU_ULRI | MIPS_CPU_RIXI; in cpu_probe_broadcom()

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