Home
last modified time | relevance | path

Searched refs:MP0_BASE (Results 1 – 24 of 24) sorted by relevance

/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/
A Ddcn316_smu.c47 static const struct IP_BASE MP0_BASE = { { { { 0x00016000, 0x00DC0000, 0x00E00000, 0x00E40000, 0x02… variable
56 (MP0_BASE.instance[0].segment[reg ## reg_name ## _BASE_IDX] + reg ## reg_name)
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/
A Ddcn315_smu.c46 static const struct IP_BASE MP0_BASE = { { { { 0x00016000, 0x00DC0000, 0x00E00000, 0x00E40000, 0x02… variable
65 (MP0_BASE.instance[0].segment[reg ## reg_name ## _BASE_IDX] + reg ## reg_name)
/linux-6.3-rc2/drivers/gpu/drm/amd/amdgpu/
A Ddimgrey_cavefish_reg_init.c40 adev->reg_offset[MP0_HWIP][i] = (uint32_t *)(&(MP0_BASE.instance[i])); in dimgrey_cavefish_reg_base_init()
A Daldebaran_reg_init.c39 adev->reg_offset[MP0_HWIP][i] = (uint32_t *)(&(MP0_BASE.instance[i])); in aldebaran_reg_base_init()
A Darct_reg_init.c39 adev->reg_offset[MP0_HWIP][i] = (uint32_t *)(&(MP0_BASE.instance[i])); in arct_reg_base_init()
A Dvega10_reg_init.c39 adev->reg_offset[MP0_HWIP][i] = (uint32_t *)(&(MP0_BASE.instance[i])); in vega10_reg_base_init()
A Dvega20_reg_init.c39 adev->reg_offset[MP0_HWIP][i] = (uint32_t *)(&(MP0_BASE.instance[i])); in vega20_reg_base_init()
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/
A Ddcn301_smu.c39 (MP0_BASE.instance[0].segment[mm ## reg_name ## _BASE_IDX] + mm ## reg_name)
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/
A Drn_clk_mgr_vbios_smu.c39 (MP0_BASE.instance[0].segment[mm ## reg_name ## _BASE_IDX] + mm ## reg_name)
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/
A Ddcn31_smu.c38 (MP0_BASE.instance[0].segment[reg ## reg_name ## _BASE_IDX] + reg ## reg_name)
/linux-6.3-rc2/drivers/gpu/drm/amd/include/
A Dcyan_skillfish_ip_offset.h87 static const struct IP_BASE MP0_BASE ={ { { { 0x00016000, 0, 0, 0, 0 } }, variable
A Dnavi10_ip_offset.h85 static const struct IP_BASE MP0_BASE ={ { { { 0x00016000, 0, 0, 0, 0, 0 } }, variable
A Dvega20_ip_offset.h87 static const struct IP_BASE MP0_BASE ={ { { { 0x00016000, 0, 0, 0, 0, 0 } }, variable
A Ddimgrey_cavefish_ip_offset.h109 static const struct IP_BASE MP0_BASE = { { { { 0x00016000, 0x00DC0000, 0x00E00000, 0x00E40000, 0x02… variable
A Dnavi12_ip_offset.h116 static const struct IP_BASE MP0_BASE ={ { { { 0x00016000, 0x00DC0000, 0x00E00000, 0x00E40000, 0x024… variable
A Dnavi14_ip_offset.h116 static const struct IP_BASE MP0_BASE ={ { { { 0x00016000, 0x00DC0000, 0x00E00000, 0x00E40000, 0x024… variable
A Dsienna_cichlid_ip_offset.h116 static const struct IP_BASE MP0_BASE = { { { { 0x00016000, 0x00DC0000, 0x00E00000, 0x00E40000, 0x02… variable
A Dbeige_goby_ip_offset.h124 static const struct IP_BASE MP0_BASE = { { { { 0x00016000, 0x00DC0000, 0x00E00000, 0x00E40000, 0x02… variable
A Dvega10_ip_offset.h58 static const struct IP_BASE __maybe_unused MP0_BASE = { { { { 0x00016000, 0, 0, 0, 0 } }, variable
A Drenoir_ip_offset.h151 static const struct IP_BASE MP0_BASE ={ { { { 0x00016000, 0x0243FC00, 0x00DC0000, 0x00E00000, 0x00E… variable
A Dvangogh_ip_offset.h138 static const struct IP_BASE MP0_BASE = { { { { 0x00016000, 0x0243FC00, 0x00DC0000, 0x00E00000, 0x00… variable
A Dyellow_carp_offset.h112 static const struct IP_BASE MP0_BASE = { { { { 0x00016000, 0x0243FC00, 0x00DC0000, 0x00E00000, 0x00… variable
A Darct_ip_offset.h95 static const struct IP_BASE MP0_BASE ={ { { { 0x00016000, 0, 0, 0, 0, 0 } }, variable
A Daldebaran_ip_offset.h133 static const struct IP_BASE MP0_BASE = { { { { 0x00016000, 0x00DC0000, 0x00E00000, 0x00E40000, 0x02… variable

Completed in 84 milliseconds