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Searched refs:MP0_HWIP (Results 1 – 18 of 18) sorted by relevance

/linux-6.3-rc2/drivers/gpu/drm/amd/amdgpu/
A Damdgpu_psp.c106 switch (adev->ip_versions[MP0_HWIP][0]) { in psp_check_pmfw_centralized_cstate_management()
134 switch (adev->ip_versions[MP0_HWIP][0]) { in psp_init_sriov_microcode()
163 switch (adev->ip_versions[MP0_HWIP][0]) { in psp_early_init()
406 adev->ip_versions[MP0_HWIP][0] == IP_VERSION(13, 0, 2); in psp_sw_init()
457 if (adev->ip_versions[MP0_HWIP][0] == IP_VERSION(11, 0, 0) || in psp_sw_init()
458 adev->ip_versions[MP0_HWIP][0] == IP_VERSION(11, 0, 7)) { in psp_sw_init()
514 if (adev->ip_versions[MP0_HWIP][0] == IP_VERSION(11, 0, 0) || in psp_sw_fini()
515 adev->ip_versions[MP0_HWIP][0] == IP_VERSION(11, 0, 7)) in psp_sw_fini()
792 switch (psp->adev->ip_versions[MP0_HWIP][0]) { in psp_skip_tmr()
1149 if (adev->ip_versions[MP0_HWIP][0] == IP_VERSION(11, 0, 4) || in psp_xgmi_terminate()
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A Dpsp_v13_0_4.c41 amdgpu_ucode_ip_version_decode(adev, MP0_HWIP, ucode_prefix, sizeof(ucode_prefix)); in psp_v13_0_4_init_microcode()
43 switch (adev->ip_versions[MP0_HWIP][0]) { in psp_v13_0_4_init_microcode()
A Ddimgrey_cavefish_reg_init.c40 adev->reg_offset[MP0_HWIP][i] = (uint32_t *)(&(MP0_BASE.instance[i])); in dimgrey_cavefish_reg_base_init()
A Daldebaran_reg_init.c39 adev->reg_offset[MP0_HWIP][i] = (uint32_t *)(&(MP0_BASE.instance[i])); in aldebaran_reg_base_init()
A Damdgpu_ras.c203 if (obj->adev->ip_versions[MP0_HWIP][0] != IP_VERSION(11, 0, 2) && in amdgpu_ras_debugfs_read()
204 obj->adev->ip_versions[MP0_HWIP][0] != IP_VERSION(11, 0, 4)) { in amdgpu_ras_debugfs_read()
562 if (obj->adev->ip_versions[MP0_HWIP][0] != IP_VERSION(11, 0, 2) && in amdgpu_ras_sysfs_read()
563 obj->adev->ip_versions[MP0_HWIP][0] != IP_VERSION(11, 0, 4)) { in amdgpu_ras_sysfs_read()
1165 if (adev->ip_versions[MP0_HWIP][0] != IP_VERSION(11, 0, 2) && in amdgpu_ras_query_error_count_helper()
1166 adev->ip_versions[MP0_HWIP][0] != IP_VERSION(11, 0, 4)) { in amdgpu_ras_query_error_count_helper()
1867 if (adev->ip_versions[MP0_HWIP][0] != IP_VERSION(11, 0, 2) && in amdgpu_ras_log_on_err_counter()
1868 adev->ip_versions[MP0_HWIP][0] != IP_VERSION(11, 0, 4) && in amdgpu_ras_log_on_err_counter()
1869 adev->ip_versions[MP0_HWIP][0] != IP_VERSION(13, 0, 0)) { in amdgpu_ras_log_on_err_counter()
2341 switch (adev->ip_versions[MP0_HWIP][0]) { in amdgpu_ras_asic_supported()
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A Darct_reg_init.c39 adev->reg_offset[MP0_HWIP][i] = (uint32_t *)(&(MP0_BASE.instance[i])); in arct_reg_base_init()
A Dpsp_v10_0.c54 amdgpu_ucode_ip_version_decode(adev, MP0_HWIP, ucode_prefix, sizeof(ucode_prefix)); in psp_v10_0_init_microcode()
A Damdgpu_discovery.c183 [MP0_HWIP] = MP0_HWID,
1620 switch (adev->ip_versions[MP0_HWIP][0]) { in amdgpu_discovery_set_psp_ip_blocks()
1664 adev->ip_versions[MP0_HWIP][0]); in amdgpu_discovery_set_psp_ip_blocks()
2013 adev->ip_versions[MP0_HWIP][0] = IP_VERSION(9, 0, 0); in amdgpu_discovery_set_ip_blocks()
2035 adev->ip_versions[MP0_HWIP][0] = IP_VERSION(9, 0, 0); in amdgpu_discovery_set_ip_blocks()
2058 adev->ip_versions[MP0_HWIP][0] = IP_VERSION(10, 0, 1); in amdgpu_discovery_set_ip_blocks()
2074 adev->ip_versions[MP0_HWIP][0] = IP_VERSION(10, 0, 0); in amdgpu_discovery_set_ip_blocks()
2096 adev->ip_versions[MP0_HWIP][0] = IP_VERSION(11, 0, 2); in amdgpu_discovery_set_ip_blocks()
2126 adev->ip_versions[MP0_HWIP][0] = IP_VERSION(11, 0, 4); in amdgpu_discovery_set_ip_blocks()
2151 adev->ip_versions[MP0_HWIP][0] = IP_VERSION(13, 0, 2); in amdgpu_discovery_set_ip_blocks()
A Dvega10_reg_init.c39 adev->reg_offset[MP0_HWIP][i] = (uint32_t *)(&(MP0_BASE.instance[i])); in vega10_reg_base_init()
A Dvega20_reg_init.c39 adev->reg_offset[MP0_HWIP][i] = (uint32_t *)(&(MP0_BASE.instance[i])); in vega20_reg_base_init()
A Dpsp_v11_0.c96 amdgpu_ucode_ip_version_decode(adev, MP0_HWIP, ucode_prefix, sizeof(ucode_prefix)); in psp_v11_0_init_microcode()
98 switch (adev->ip_versions[MP0_HWIP][0]) { in psp_v11_0_init_microcode()
A Dpsp_v13_0.c76 amdgpu_ucode_ip_version_decode(adev, MP0_HWIP, ucode_prefix, sizeof(ucode_prefix)); in psp_v13_0_init_microcode()
78 switch (adev->ip_versions[MP0_HWIP][0]) { in psp_v13_0_init_microcode()
A Dpsp_v12_0.c55 amdgpu_ucode_ip_version_decode(adev, MP0_HWIP, ucode_prefix, sizeof(ucode_prefix)); in psp_v12_0_init_microcode()
A Dpsp_v3_1.c65 amdgpu_ucode_ip_version_decode(adev, MP0_HWIP, ucode_prefix, sizeof(ucode_prefix)); in psp_v3_1_init_microcode()
A Damdgpu_ucode.c1064 if (block_type == MP0_HWIP) { in amdgpu_ucode_legacy_naming()
1065 switch (adev->ip_versions[MP0_HWIP][0]) { in amdgpu_ucode_legacy_naming()
1292 case MP0_HWIP: in amdgpu_ucode_ip_version_decode()
A Damdgpu_virt.c840 switch (adev->ip_versions[MP0_HWIP][0]) { in amdgpu_virt_fw_load_skip_check()
A Damdgpu.h657 MP0_HWIP, enumerator
A Dsoc15.c1418 if (adev->ip_versions[MP0_HWIP][0] != IP_VERSION(13, 0, 2)) { in soc15_common_get_clockgating_state()

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