Home
last modified time | relevance | path

Searched refs:MTL_VPU_HOST_SS_CPR_RST_CLR (Results 1 – 2 of 2) sorted by relevance

/linux-6.3-rc2/drivers/accel/ivpu/
A Divpu_hw_mtl.c258 u32 val = REGV_RD32(MTL_VPU_HOST_SS_CPR_RST_CLR); in ivpu_boot_host_ss_rst_clr_assert()
260 val = REG_SET_FLD(MTL_VPU_HOST_SS_CPR_RST_CLR, TOP_NOC, val); in ivpu_boot_host_ss_rst_clr_assert()
261 val = REG_SET_FLD(MTL_VPU_HOST_SS_CPR_RST_CLR, DSS_MAS, val); in ivpu_boot_host_ss_rst_clr_assert()
262 val = REG_SET_FLD(MTL_VPU_HOST_SS_CPR_RST_CLR, MSS_MAS, val); in ivpu_boot_host_ss_rst_clr_assert()
264 REGV_WR32(MTL_VPU_HOST_SS_CPR_RST_CLR, val); in ivpu_boot_host_ss_rst_clr_assert()
A Divpu_hw_mtl_reg.h93 #define MTL_VPU_HOST_SS_CPR_RST_CLR 0x00000098u macro

Completed in 5 milliseconds