Searched refs:MX6ULL_PAD_SNVS_TAMPER2__GPIO5_IO02 (Results 1 – 7 of 7) sorted by relevance
17 #define MX6ULL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x0010 0x0054 0x0000 0x5 0x0 macro
22 MX6ULL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x17059
21 MX6ULL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x0b0b0
442 MX6ULL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x00020
336 MX6ULL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x17059
599 fsl,pins = <MX6ULL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x400120b0>;
752 MX6ULL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x130b0
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