Searched refs:MX6ULL_PAD_SNVS_TAMPER7__GPIO5_IO07 (Results 1 – 5 of 5) sorted by relevance
22 #define MX6ULL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x0024 0x0068 0x0000 0x5 0x0 macro
26 MX6ULL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x0b0b0
451 MX6ULL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x17000
611 fsl,pins = <MX6ULL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x400120b0>;
740 MX6ULL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x100b0
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