| /linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/ |
| A D | dcn316_clk_mgr.c | 370 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MaxClock = 0xFFFF; in dcn316_build_watermark_ranges()
386 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MaxClock = 0xFFFF; in dcn316_build_watermark_ranges()
389 table->WatermarkRow[WM_DCFCLK][num_valid_sets - 1].MaxClock = 0xFFFF; in dcn316_build_watermark_ranges()
400 table->WatermarkRow[WM_DCFCLK][num_valid_sets - 1].MaxClock = 0xFFFF; in dcn316_build_watermark_ranges()
405 table->WatermarkRow[WM_SOCCLK][0].MaxClock = 0xFFFF; in dcn316_build_watermark_ranges()
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| A D | dcn316_smu.h | 42 uint16_t MaxClock; // This is either DCFCLK or SOCCLK (in MHz) member
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| /linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/ |
| A D | dcn30_smu11_driver_if.h | 26 uint16_t MaxClock; // This is either DCEFCLK or SOCCLK (in MHz) member
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| A D | dcn30_clk_mgr.c | 344 …table->Watermarks.WatermarkRow[WM_DCEFCLK][i].MaxClock = clk_mgr->base.bw_params->wm_table.nv_entr… in dcn3_notify_wm_ranges()
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| /linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/ |
| A D | vg_clk_mgr.c | 403 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MaxClock = 0xFFFF; in vg_build_watermark_ranges()
419 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MaxClock = 0xFFFF; in vg_build_watermark_ranges()
422 table->WatermarkRow[WM_DCFCLK][num_valid_sets - 1].MaxClock = 0xFFFF; in vg_build_watermark_ranges()
433 table->WatermarkRow[WM_DCFCLK][num_valid_sets - 1].MaxClock = 0xFFFF; in vg_build_watermark_ranges()
438 table->WatermarkRow[WM_SOCCLK][0].MaxClock = 0xFFFF; in vg_build_watermark_ranges()
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| A D | dcn301_smu.h | 57 uint16_t MaxClock; // This is either DCFCLK or SOCCLK (in MHz) member
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| /linux-6.3-rc2/drivers/gpu/drm/amd/pm/powerplay/inc/ |
| A D | smu10_driver_if.h | 52 uint16_t MaxClock; /* This is either DCFCLK or SOCCLK (in MHz) */ member
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| A D | smu9_driver_if.h | 331 uint16_t MaxClock; // This is either DCEFCLK or SOCCLK (in MHz) member
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| A D | smu11_driver_if.h | 682 uint16_t MaxClock; member
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| /linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/ |
| A D | dcn315_clk_mgr.c | 392 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MaxClock = 0xFFFF; in dcn315_build_watermark_ranges()
408 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MaxClock = 0xFFFF; in dcn315_build_watermark_ranges()
411 table->WatermarkRow[WM_DCFCLK][num_valid_sets - 1].MaxClock = 0xFFFF; in dcn315_build_watermark_ranges()
422 table->WatermarkRow[WM_DCFCLK][num_valid_sets - 1].MaxClock = 0xFFFF; in dcn315_build_watermark_ranges()
427 table->WatermarkRow[WM_SOCCLK][0].MaxClock = 0xFFFF; in dcn315_build_watermark_ranges()
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| A D | dcn315_smu.h | 43 uint16_t MaxClock; // This is either DCFCLK or SOCCLK (in MHz) member
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| /linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/ |
| A D | dcn31_clk_mgr.c | 435 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MaxClock = 0xFFFF; in dcn31_build_watermark_ranges()
451 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MaxClock = 0xFFFF; in dcn31_build_watermark_ranges()
454 table->WatermarkRow[WM_DCFCLK][num_valid_sets - 1].MaxClock = 0xFFFF; in dcn31_build_watermark_ranges()
465 table->WatermarkRow[WM_DCFCLK][num_valid_sets - 1].MaxClock = 0xFFFF; in dcn31_build_watermark_ranges()
470 table->WatermarkRow[WM_SOCCLK][0].MaxClock = 0xFFFF; in dcn31_build_watermark_ranges()
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| A D | dcn31_smu.h | 53 uint16_t MaxClock; // This is either DCFCLK or SOCCLK (in MHz) member
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| /linux-6.3-rc2/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/ |
| A D | smu13_driver_if_v13_0_5.h | 53 uint16_t MaxClock; // This is either DCFCLK or SOCCLK (in MHz) member
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| A D | smu12_driver_if.h | 52 uint16_t MaxClock; // This is either DCFCLK or SOCCLK (in MHz) member
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| A D | smu13_driver_if_yellow_carp.h | 51 uint16_t MaxClock; // This is either DCFCLK or SOCCLK (in MHz) member
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| A D | smu11_driver_if_vangogh.h | 51 uint16_t MaxClock; // This is either DCFCLK or SOCCLK (in MHz) member
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| A D | smu13_driver_if_v13_0_4.h | 52 uint16_t MaxClock; // This is either DCFCLK or SOCCLK (in MHz) member
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| /linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/ |
| A D | dcn314_clk_mgr.c | 453 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MaxClock = 0xFFFF; in dcn314_build_watermark_ranges()
469 table->WatermarkRow[WM_DCFCLK][num_valid_sets].MaxClock = 0xFFFF; in dcn314_build_watermark_ranges()
472 table->WatermarkRow[WM_DCFCLK][num_valid_sets - 1].MaxClock = 0xFFFF; in dcn314_build_watermark_ranges()
483 table->WatermarkRow[WM_DCFCLK][num_valid_sets - 1].MaxClock = 0xFFFF; in dcn314_build_watermark_ranges()
488 table->WatermarkRow[WM_SOCCLK][0].MaxClock = 0xFFFF; in dcn314_build_watermark_ranges()
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| /linux-6.3-rc2/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
| A D | smu_helper.h | 37 uint16_t MaxClock; member
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| A D | smu_helper.c | 741 table->WatermarkRow[1][i].MaxClock = in smu_set_watermarks_for_clocks_ranges()
762 table->WatermarkRow[0][i].MaxClock = in smu_set_watermarks_for_clocks_ranges()
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| /linux-6.3-rc2/drivers/gpu/drm/amd/pm/swsmu/smu13/ |
| A D | smu_v13_0_4_ppt.c | 648 table->WatermarkRow[WM_DCFCLK][i].MaxClock = in smu_v13_0_4_set_watermarks_table()
662 table->WatermarkRow[WM_SOCCLK][i].MaxClock = in smu_v13_0_4_set_watermarks_table()
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| A D | smu_v13_0_5_ppt.c | 417 table->WatermarkRow[WM_DCFCLK][i].MaxClock = in smu_v13_0_5_set_watermarks_table()
431 table->WatermarkRow[WM_SOCCLK][i].MaxClock = in smu_v13_0_5_set_watermarks_table()
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| A D | yellow_carp_ppt.c | 500 table->WatermarkRow[WM_DCFCLK][i].MaxClock = in yellow_carp_set_watermarks_table()
514 table->WatermarkRow[WM_SOCCLK][i].MaxClock = in yellow_carp_set_watermarks_table()
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| /linux-6.3-rc2/drivers/gpu/drm/amd/pm/powerplay/inc/vega12/ |
| A D | smu9_driver_if.h | 575 uint16_t MaxClock; member
|