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Searched refs:OTG_CONTROL (Results 1 – 12 of 12) sorted by relevance

/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dcn32/
A Ddcn32_optc.c127 REG_UPDATE_2(OTG_CONTROL, in optc32_enable_crtc()
145 REG_UPDATE(OTG_CONTROL, in optc32_disable_crtc()
164 REG_UPDATE_2(OTG_CONTROL, OTG_DISABLE_POINT_CNTL, 0, OTG_MASTER_EN, 0); in optc32_phantom_crtc_post_enable()
174 REG_UPDATE(OTG_CONTROL, OTG_MASTER_EN, 0); in optc32_disable_phantom_otg()
A Ddcn32_optc.h50 SRI(OTG_CONTROL, OTG, inst),\
A Ddcn32_resource.h1027 SRI_ARR(OTG_CONTROL, OTG, inst), SRI_ARR(OTG_STEREO_CONTROL, OTG, inst), \
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dcn20/
A Ddcn20_optc.c65 REG_UPDATE_2(OTG_CONTROL, in optc2_enable_crtc()
277 REG_UPDATE(OTG_CONTROL, OTG_MASTER_EN, 0); in optc2_align_vblanks()
279 REG_WAIT(OTG_CONTROL, in optc2_align_vblanks()
336 REG_UPDATE(OTG_CONTROL, in optc2_align_vblanks()
353 REG_WAIT(OTG_CONTROL, in optc2_align_vblanks()
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dcn314/
A Ddcn314_optc.c121 REG_UPDATE_2(OTG_CONTROL, in optc314_enable_crtc()
139 REG_UPDATE(OTG_CONTROL, in optc314_disable_crtc()
158 REG_UPDATE_2(OTG_CONTROL, OTG_DISABLE_POINT_CNTL, 0, OTG_MASTER_EN, 0); in optc314_phantom_crtc_post_enable()
A Ddcn314_optc.h51 SRI(OTG_CONTROL, OTG, inst),\
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dcn31/
A Ddcn31_optc.c112 REG_UPDATE_2(OTG_CONTROL, in optc31_enable_crtc()
129 REG_UPDATE(OTG_CONTROL, in optc31_disable_crtc()
148 REG_UPDATE_2(OTG_CONTROL, in optc31_immediate_disable_crtc()
A Ddcn31_optc.h50 SRI(OTG_CONTROL, OTG, inst),\
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dcn10/
A Ddcn10_optc.c264 REG_UPDATE_2(OTG_CONTROL, in optc1_program_timing()
520 REG_UPDATE_2(OTG_CONTROL, in optc1_enable_crtc()
538 REG_UPDATE_2(OTG_CONTROL, in optc1_disable_crtc()
1325 REG_GET(OTG_CONTROL, in optc1_read_otg_state()
1396 REG_GET(OTG_CONTROL, in optc1_get_otg_active_size()
1434 REG_GET(OTG_CONTROL, OTG_MASTER_EN, &otg_enabled); in optc1_is_tg_enabled()
A Ddcn10_optc.h52 SRI(OTG_CONTROL, OTG, inst),\
124 uint32_t OTG_CONTROL; member
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dcn30/
A Ddcn30_optc.c140 REG_UPDATE(OTG_CONTROL, OTG_OUT_MUX, dest); in optc3_set_out_mux()
A Ddcn30_optc.h52 SRI(OTG_CONTROL, OTG, inst),\

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