Searched refs:PACKET3_SET_CONTEXT_REG_START (Results 1 – 19 of 19) sorted by relevance
| /linux-6.3-rc2/drivers/gpu/drm/amd/amdgpu/ |
| A D | si_enums.h | 263 #define PACKET3_SET_CONTEXT_REG_START 0x000a000 macro
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| A D | soc15d.h | 291 #define PACKET3_SET_CONTEXT_REG_START 0x0000a000 macro
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| A D | nvd.h | 322 #define PACKET3_SET_CONTEXT_REG_START 0x0000a000 macro
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| A D | vid.h | 343 #define PACKET3_SET_CONTEXT_REG_START 0x0000a000 macro
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| A D | cikd.h | 461 #define PACKET3_SET_CONTEXT_REG_START 0x0000a000 macro
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| A D | gfx_v7_0.c | 2491 amdgpu_ring_write(ring, ext->reg_index - PACKET3_SET_CONTEXT_REG_START); in gfx_v7_0_cp_gfx_start()
2499 amdgpu_ring_write(ring, mmPA_SC_RASTER_CONFIG - PACKET3_SET_CONTEXT_REG_START); in gfx_v7_0_cp_gfx_start()
3940 buffer[count++] = cpu_to_le32(ext->reg_index - PACKET3_SET_CONTEXT_REG_START); in gfx_v7_0_get_csb_buffer()
3950 buffer[count++] = cpu_to_le32(mmPA_SC_RASTER_CONFIG - PACKET3_SET_CONTEXT_REG_START); in gfx_v7_0_get_csb_buffer()
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| A D | sid.h | 1849 #define PACKET3_SET_CONTEXT_REG_START 0x000a000 macro
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| A D | gfx_v8_0.c | 1235 PACKET3_SET_CONTEXT_REG_START); in gfx_v8_0_get_csb_buffer()
1246 PACKET3_SET_CONTEXT_REG_START); in gfx_v8_0_get_csb_buffer()
4173 ext->reg_index - PACKET3_SET_CONTEXT_REG_START); in gfx_v8_0_cp_gfx_start()
4181 amdgpu_ring_write(ring, mmPA_SC_RASTER_CONFIG - PACKET3_SET_CONTEXT_REG_START); in gfx_v8_0_cp_gfx_start()
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| A D | gfx_v11_0.c | 609 PACKET3_SET_CONTEXT_REG_START); in gfx_v11_0_get_csb_buffer()
619 SOC15_REG_OFFSET(GC, 0, regPA_SC_TILE_STEERING_OVERRIDE) - PACKET3_SET_CONTEXT_REG_START; in gfx_v11_0_get_csb_buffer()
3110 PACKET3_SET_CONTEXT_REG_START); in gfx_v11_0_cp_gfx_start()
3118 SOC15_REG_OFFSET(GC, 0, regPA_SC_TILE_STEERING_OVERRIDE) - PACKET3_SET_CONTEXT_REG_START; in gfx_v11_0_cp_gfx_start()
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| A D | gfx_v6_0.c | 2025 amdgpu_ring_write(ring, ext->reg_index - PACKET3_SET_CONTEXT_REG_START); in gfx_v6_0_cp_gfx_start()
2870 buffer[count++] = cpu_to_le32(mmPA_SC_RASTER_CONFIG - PACKET3_SET_CONTEXT_REG_START); in gfx_v6_0_get_csb_buffer()
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| A D | gfx_v10_0.c | 4115 PACKET3_SET_CONTEXT_REG_START); in gfx_v10_0_get_csb_buffer()
4125 SOC15_REG_OFFSET(GC, 0, mmPA_SC_TILE_STEERING_OVERRIDE) - PACKET3_SET_CONTEXT_REG_START; in gfx_v10_0_get_csb_buffer()
5968 PACKET3_SET_CONTEXT_REG_START); in gfx_v10_0_cp_gfx_start()
5976 SOC15_REG_OFFSET(GC, 0, mmPA_SC_TILE_STEERING_OVERRIDE) - PACKET3_SET_CONTEXT_REG_START; in gfx_v10_0_cp_gfx_start()
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| A D | gfx_v9_0.c | 1460 PACKET3_SET_CONTEXT_REG_START); in gfx_v9_0_get_csb_buffer()
3039 ext->reg_index - PACKET3_SET_CONTEXT_REG_START); in gfx_v9_0_cp_gfx_start()
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| /linux-6.3-rc2/drivers/gpu/drm/radeon/ |
| A D | evergreen_cs.c | 2317 start_reg = (idx_value << 2) + PACKET3_SET_CONTEXT_REG_START; in evergreen_packet3_check()
2319 if ((start_reg < PACKET3_SET_CONTEXT_REG_START) || in evergreen_packet3_check()
2628 allowed_reg_base -= PACKET3_SET_CONTEXT_REG_START; in evergreen_packet3_check()
3503 allowed_reg_base -= PACKET3_SET_CONTEXT_REG_START; in evergreen_vm_packet3_check()
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| A D | nid.h | 1273 #define PACKET3_SET_CONTEXT_REG_START 0x00028000 macro
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| A D | sid.h | 1786 #define PACKET3_SET_CONTEXT_REG_START 0x00028000 macro
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| A D | cikd.h | 1929 #define PACKET3_SET_CONTEXT_REG_START 0x00028000 macro
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| A D | evergreend.h | 1669 #define PACKET3_SET_CONTEXT_REG_START 0x00028000 macro
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| A D | si.c | 5743 buffer[count++] = cpu_to_le32(PA_SC_RASTER_CONFIG - PACKET3_SET_CONTEXT_REG_START); in si_get_csb_buffer()
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| A D | cik.c | 6732 buffer[count++] = cpu_to_le32(PA_SC_RASTER_CONFIG - PACKET3_SET_CONTEXT_REG_START); in cik_get_csb_buffer()
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