Searched refs:PCI_BRIDGE_CTL_BUS_RESET (Results 1 – 10 of 10) sorted by relevance
57 bridge_ctl |= PCI_BRIDGE_CTL_BUS_RESET; in adf_reset_sbr()60 bridge_ctl &= ~PCI_BRIDGE_CTL_BUS_RESET; in adf_reset_sbr()
184 ctrl &= ~PCI_BRIDGE_CTL_BUS_RESET; in ls_g4_pcie_reset()
608 val |= PCI_BRIDGE_CTL_BUS_RESET << 16; in mvebu_pci_bridge_emul_base_conf_read()610 val &= ~(PCI_BRIDGE_CTL_BUS_RESET << 16); in mvebu_pci_bridge_emul_base_conf_read()779 if (mask & (PCI_BRIDGE_CTL_BUS_RESET << 16)) { in mvebu_pci_bridge_emul_base_conf_write()781 if (new & (PCI_BRIDGE_CTL_BUS_RESET << 16)) in mvebu_pci_bridge_emul_base_conf_write()
803 val |= PCI_BRIDGE_CTL_BUS_RESET << 16; in advk_pci_bridge_emul_base_conf_read()805 val &= ~(PCI_BRIDGE_CTL_BUS_RESET << 16); in advk_pci_bridge_emul_base_conf_read()840 if (mask & (PCI_BRIDGE_CTL_BUS_RESET << 16)) { in advk_pci_bridge_emul_base_conf_write()842 if (new & (PCI_BRIDGE_CTL_BUS_RESET << 16)) in advk_pci_bridge_emul_base_conf_write()
163 PCI_BRIDGE_CTL_BUS_RESET |
5042 ctrl |= PCI_BRIDGE_CTL_BUS_RESET; in pci_reset_secondary_bus()5051 ctrl &= ~PCI_BRIDGE_CTL_BUS_RESET; in pci_reset_secondary_bus()
303 status &= ~(PCI_BRIDGE_CTL_BUS_RESET|PCI_BRIDGE_CTL_FAST_BACK); in pcibios_fixup_bus()
826 ctrl |= PCI_BRIDGE_CTL_BUS_RESET; in __pnv_eeh_bridge_reset()833 ctrl &= ~PCI_BRIDGE_CTL_BUS_RESET; in __pnv_eeh_bridge_reset()
166 #define PCI_BRIDGE_CTL_BUS_RESET 0x40 /* Secondary bus reset */ macro
1320 pci_bctl |= PCI_BRIDGE_CTL_BUS_RESET; in stex_hard_reset()1328 pci_bctl &= ~PCI_BRIDGE_CTL_BUS_RESET; in stex_hard_reset()
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