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Searched refs:PCLK_CSIPHY0 (Results 1 – 4 of 4) sorted by relevance

/linux-6.3-rc2/include/dt-bindings/clock/
A Drockchip,rv1126-cru.h350 #define PCLK_CSIPHY0 290 macro
A Drockchip,rk3588-cru.h269 #define PCLK_CSIPHY0 254 macro
/linux-6.3-rc2/drivers/clk/rockchip/
A Dclk-rv1126.c846 GATE(PCLK_CSIPHY0, "pclk_csiphy0", "pclk_pdtop", 0,
A Dclk-rk3588.c798 GATE(PCLK_CSIPHY0, "pclk_csiphy0", "pclk_top_root", 0,

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