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Searched refs:PCLK_PWM (Results 1 – 23 of 23) sorted by relevance

/linux-6.3-rc2/include/dt-bindings/clock/
A Dsamsung,s3c64xx-clock.h82 #define PCLK_PWM 67 macro
A Drk3036-cru.h71 #define PCLK_PWM 350 macro
A Dexynos7-clk.h87 #define PCLK_PWM 10 macro
A Drk3128-cru.h112 #define PCLK_PWM 350 macro
A Drk3228-cru.h111 #define PCLK_PWM 350 macro
A Drv1108-cru.h120 #define PCLK_PWM 269 macro
A Drk3288-cru.h142 #define PCLK_PWM 350 macro
A Drk3328-cru.h145 #define PCLK_PWM 214 macro
/linux-6.3-rc2/arch/arm/boot/dts/
A Drk3036.dtsi427 clocks = <&cru PCLK_PWM>;
437 clocks = <&cru PCLK_PWM>;
447 clocks = <&cru PCLK_PWM>;
457 clocks = <&cru PCLK_PWM>;
A Drk3128.dtsi291 clocks = <&cru PCLK_PWM>;
301 clocks = <&cru PCLK_PWM>;
311 clocks = <&cru PCLK_PWM>;
321 clocks = <&cru PCLK_PWM>;
A Drv1108.dtsi200 clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
212 clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
224 clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
236 clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
A Ds3c64xx.dtsi170 clocks = <&clocks PCLK_PWM>;
A Drk322x.dtsi440 clocks = <&cru PCLK_PWM>;
450 clocks = <&cru PCLK_PWM>;
460 clocks = <&cru PCLK_PWM>;
470 clocks = <&cru PCLK_PWM>;
/linux-6.3-rc2/drivers/clk/samsung/
A Dclk-s3c64xx.c238 GATE_BUS(PCLK_PWM, "pclk_pwm", "pclk", PCLK_GATE, 7),
343 ALIAS(PCLK_PWM, NULL, "timers"),
A Dclk-exynos7.c670 GATE(PCLK_PWM, "pclk_pwm", "mout_aclk_peric0_66_user",
/linux-6.3-rc2/drivers/clk/rockchip/
A Dclk-rk3036.c414 GATE(PCLK_PWM, "pclk_pwm", "pclk_peri", 0, RK2928_CLKGATE_CON(7), 10, GFLAGS),
A Dclk-rk3128.c511 GATE(PCLK_PWM, "pclk_pwm", "pclk_peri", 0, RK2928_CLKGATE_CON(7), 10, GFLAGS),
A Dclk-rk3228.c608 GATE(PCLK_PWM, "pclk_rk_pwm", "pclk_cpu", 0, RK2928_CLKGATE_CON(9), 7, GFLAGS),
A Dclk-rk3328.c778 GATE(PCLK_PWM, "pclk_rk_pwm", "pclk_bus", 0, RK3328_CLKGATE_CON(16), 6, GFLAGS),
A Dclk-rv1108.c630 GATE(PCLK_PWM, "pclk_pwm", "pclk_bus_pre", 0,
A Dclk-rk3288.c683 GATE(PCLK_PWM, "pclk_pwm", "pclk_cpu", 0, RK3288_CLKGATE_CON(10), 0, GFLAGS),
/linux-6.3-rc2/arch/arm64/boot/dts/rockchip/
A Drk3328.dtsi455 clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
466 clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
477 clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
489 clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
/linux-6.3-rc2/arch/arm64/boot/dts/exynos/
A Dexynos7.dtsi632 clocks = <&clock_peric0 PCLK_PWM>;

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