Home
last modified time | relevance | path

Searched refs:PCLK_UART4 (Results 1 – 21 of 21) sorted by relevance

/linux-6.3-rc2/include/dt-bindings/clock/
A Dpx30-cru.h155 #define PCLK_UART4 332 macro
A Drk3288-cru.h137 #define PCLK_UART4 345 macro
A Drk3308-cru.h180 #define PCLK_UART4 201 macro
A Drk3368-cru.h129 #define PCLK_UART4 345 macro
A Drockchip,rv1126-cru.h315 #define PCLK_UART4 253 macro
A Drockchip,rk3588-cru.h177 #define PCLK_UART4 162 macro
A Drk3568-cru.h359 #define PCLK_UART4 296 macro
/linux-6.3-rc2/arch/arm/boot/dts/
A Drv1126.dtsi288 clocks = <&cru SCLK_UART4>, <&cru PCLK_UART4>;
A Drk3288.dtsi437 clocks = <&cru SCLK_UART4>, <&cru PCLK_UART4>;
/linux-6.3-rc2/drivers/clk/rockchip/
A Dclk-rk3368.c796 GATE(PCLK_UART4, "pclk_uart4", "pclk_peri", 0, RK3368_CLKGATE_CON(19), 10, GFLAGS),
A Dclk-rk3288.c743 GATE(PCLK_UART4, "pclk_uart4", "pclk_peri", 0, RK3288_CLKGATE_CON(6), 12, GFLAGS),
A Dclk-px30.c849 GATE(PCLK_UART4, "pclk_uart4", "pclk_bus_pre", 0, PX30_CLKGATE_CON(14), 8, GFLAGS),
A Dclk-rk3308.c869 GATE(PCLK_UART4, "pclk_uart4", "pclk_bus", 0, RK3308_CLKGATE_CON(5), 14, GFLAGS),
A Dclk-rv1126.c485 GATE(PCLK_UART4, "pclk_uart4", "pclk_pdbus", 0,
A Dclk-rk3568.c1235 GATE(PCLK_UART4, "pclk_uart4", "pclk_bus", 0,
A Dclk-rk3588.c1215 GATE(PCLK_UART4, "pclk_uart4", "pclk_top_root", 0,
/linux-6.3-rc2/arch/arm64/boot/dts/rockchip/
A Drk3368.dtsi364 clocks = <&cru SCLK_UART4>, <&cru PCLK_UART4>;
A Drk3308.dtsi347 clocks = <&cru SCLK_UART4>, <&cru PCLK_UART4>;
A Drk3588s.dtsi1342 clocks = <&cru SCLK_UART4>, <&cru PCLK_UART4>;
A Drk356x.dtsi1370 clocks = <&cru SCLK_UART4>, <&cru PCLK_UART4>;
A Dpx30.dtsi545 clocks = <&cru SCLK_UART4>, <&cru PCLK_UART4>;

Completed in 72 milliseconds