Searched refs:PCS (Results 1 – 25 of 34) sorted by relevance
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| /linux-6.3-rc2/drivers/net/pcs/ |
| A D | Kconfig | 3 # PCS Layer Configuration
6 menu "PCS device drivers"
18 This module provides helpers to phylink for managing the Lynx PCS
26 on RZ/N1 SoCs. This PCS converts MII to RMII/RGMII or can be set in
33 Ethernet SGMII PCS, that can be found on the Intel Socfpga family.
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| /linux-6.3-rc2/Documentation/networking/device_drivers/ethernet/freescale/dpaa2/ |
| A D | mac-phy-support.rst | 54 | MC firmware polling MAC PCS for link |
56 | | PCS | | PCS | | PCS | | PCS | |
65 the MC firmware by polling the MAC PCS. Without the need to register a
187 mode, the MC firmware does not access the PCS registers). One can check for
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| /linux-6.3-rc2/Documentation/devicetree/bindings/net/pcs/ |
| A D | fsl,lynx-pcs.yaml | 7 title: NXP Lynx PCS
13 NXP Lynx 10G and 28G SerDes have Ethernet PCS devices which can be used as
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| /linux-6.3-rc2/Documentation/devicetree/bindings/net/ |
| A D | xilinx_axienet.txt | 30 this to the PCS/PMA PHY is deprecated and should be avoided.
52 PCS/PMA PHY)
74 - pcs-handle: Phandle to the internal PCS/PMA PHY in SGMII or 1000Base-X
76 to the PCS/PMA PHY, and "phy-handle" should point to an
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| A D | amd-xgbe.txt | 7 - PCS registers
15 The last interrupt listed should be the PCS auto-negotiation interrupt.
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| A D | fsl-fman.txt | 292 Definition: Fman has internal MDIO for internal PCS(Physical
311 set when reading internal PCS registers. MDIO reads to
312 internal PCS registers may result in having the
316 PCS registers through MDIO. As a workaround, all internal
323 - For "fsl,fman-memac-mdio" compatible internal mdio bus, the PHY is PCS PHY.
324 The PCS PHY address should correspond to the value of the appropriate
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| A D | fsl,fman-dtsec.yaml | 120 description: The type of each PCS in pcsphy-handle.
124 description: A reference to the (TBI-based) PCS
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| A D | fsl,qoriq-mc-dpmac.yaml | 36 A reference to a node representing a PCS PHY device found on
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| A D | ethernet-controller.yaml | 115 Specifies a reference to a node representing a PCS PHY device on a MDIO
120 The name of each PCS in pcs-handle.
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| /linux-6.3-rc2/Documentation/devicetree/bindings/phy/ |
| A D | qcom,msm8996-qmp-ufs-phy.yaml | 177 - description: PCS
195 - description: PCS
213 - description: PCS
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| A D | qcom,msm8996-qmp-usb3-phy.yaml | 291 - description: PCS
310 - description: PCS
337 - description: PCS
356 - description: PCS
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| A D | qcom,ipq8074-qmp-pcie-phy.yaml | 217 - description: PCS
240 - description: PCS
260 - description: PCS
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| A D | ti-phy.txt | 13 set PCS delay value.
59 register offset to write the PCS delay value.
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| A D | qcom,sc7180-qmp-usb3-dp-phy.yaml | 99 - description: Address and length of PCS.
140 - description: Address and length of PCS.
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| A D | transmit-amplitude.yaml | 7 title: Common PHY and network PCS transmit amplitude property
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| A D | qcom,msm8996-qmp-pcie-phy.yaml | 65 - description: PCS
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| /linux-6.3-rc2/Documentation/devicetree/bindings/pci/ |
| A D | snps,dw-pcie-common.yaml | 90 Controller Core-PCS PIPE interface clock. It's normally
91 supplied by an external PCS-PHY.
159 - description: PIPE-interface (Core-PCS) logic reset
164 - description: PCS/PHY block reset
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| A D | snps,dw-pcie-ep.yaml | 85 PHY/PCS configuration registers. Some platforms can have the
86 PCS and PHY CSRs accessible over a dedicated memory mapped
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| A D | snps,dw-pcie.yaml | 85 PHY/PCS configuration registers. Some platforms can have the
86 PCS and PHY CSRs accessible over a dedicated memory mapped
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| /linux-6.3-rc2/arch/arm/boot/dts/ |
| A D | ls1021a-tsn.dts | 236 /* SGMII PCS for enet0 */
244 /* SGMII PCS for enet1 */
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| /linux-6.3-rc2/Documentation/devicetree/bindings/net/dsa/ |
| A D | renesas,rzn1-a5psw.yaml | 79 phandle pointing to a PCS sub-node compatible with
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| A D | mscc,ocelot.yaml | 45 EA BAR 0) used to access the MAC PCS registers truly belongs to the enetc
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| /linux-6.3-rc2/drivers/spi/ |
| A D | spi-atmel.c | 343 SPI_BF(PCS, ~(0x01 << chip_select)) in cs_activate()
349 SPI_BF(PCS, ~(0x01 << chip_select)) in cs_activate()
369 mr = SPI_BFINS(PCS, ~(1 << chip_select), mr); in cs_activate()
390 if (~SPI_BFEXT(PCS, mr) & (1 << chip_select)) { in cs_deactivate()
391 mr = SPI_BFINS(PCS, 0xf, mr); in cs_deactivate()
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| /linux-6.3-rc2/arch/arm64/boot/dts/qcom/ |
| A D | ipq8074.dtsi | 134 <0x00058800 0x1f8>, /* PCS */
135 <0x00058600 0x044>; /* PCS misc */
177 <0x00078800 0x1f8>, /* PCS */
178 <0x00078600 0x044>; /* PCS misc */
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| A D | ipq6018.dtsi | 240 <0x0 0x00078800 0x0 0x1f8>, /* PCS */
241 <0x0 0x00078600 0x0 0x044>; /* PCS misc */
283 <0x0 0x00084800 0x0 0x1f0>, /* PCS: Lane0, COM, PCIE */
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