Searched refs:PHYASYMCLK_CLOCK_CNTL (Results 1 – 7 of 7) sorted by relevance
| /linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dcn30/ |
| A D | dcn30_dccg.h | 34 SR(PHYASYMCLK_CLOCK_CNTL),\
45 SR(PHYASYMCLK_CLOCK_CNTL),\
53 DCCG_SF(PHYASYMCLK_CLOCK_CNTL, PHYASYMCLK_FORCE_EN, mask_sh),\
54 DCCG_SF(PHYASYMCLK_CLOCK_CNTL, PHYASYMCLK_FORCE_SRC_SEL, mask_sh),\
62 DCCG_SF(PHYASYMCLK_CLOCK_CNTL, PHYASYMCLK_FORCE_EN, mask_sh),\
63 DCCG_SF(PHYASYMCLK_CLOCK_CNTL, PHYASYMCLK_FORCE_SRC_SEL, mask_sh),\
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| /linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dcn32/ |
| A D | dcn32_dccg.h | 42 SR(PHYASYMCLK_CLOCK_CNTL),\
83 DCCG_SF(PHYASYMCLK_CLOCK_CNTL, PHYASYMCLK_FORCE_EN, mask_sh),\
84 DCCG_SF(PHYASYMCLK_CLOCK_CNTL, PHYASYMCLK_FORCE_SRC_SEL, mask_sh),\
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| A D | dcn32_resource.h | 1268 SR(PHYASYMCLK_CLOCK_CNTL), SR(PHYBSYMCLK_CLOCK_CNTL), \
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| /linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dcn314/ |
| A D | dcn314_dccg.h | 43 SR(PHYASYMCLK_CLOCK_CNTL),\
167 DCCG_SF(PHYASYMCLK_CLOCK_CNTL, PHYASYMCLK_FORCE_EN, mask_sh),\
168 DCCG_SF(PHYASYMCLK_CLOCK_CNTL, PHYASYMCLK_FORCE_SRC_SEL, mask_sh),\
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| /linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dcn31/ |
| A D | dcn31_dccg.h | 37 SR(PHYASYMCLK_CLOCK_CNTL),\
81 DCCG_SF(PHYASYMCLK_CLOCK_CNTL, PHYASYMCLK_FORCE_EN, mask_sh),\
82 DCCG_SF(PHYASYMCLK_CLOCK_CNTL, PHYASYMCLK_FORCE_SRC_SEL, mask_sh),\
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| A D | dcn31_dccg.c | 425 REG_UPDATE_2(PHYASYMCLK_CLOCK_CNTL, in dccg31_set_physymclk()
432 REG_UPDATE_2(PHYASYMCLK_CLOCK_CNTL, in dccg31_set_physymclk()
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| /linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dcn20/ |
| A D | dcn20_dccg.h | 256 uint32_t PHYASYMCLK_CLOCK_CNTL; member
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