Home
last modified time | relevance | path

Searched refs:PHYCLK_USBDRD300_UDRD30_PIPE_PCLK_USER (Results 1 – 3 of 3) sorted by relevance

/linux-6.3-rc2/include/dt-bindings/clock/
A Dexynos7-clk.h136 #define PHYCLK_USBDRD300_UDRD30_PIPE_PCLK_USER 6 macro
/linux-6.3-rc2/drivers/clk/samsung/
A Dclk-exynos7.c951 GATE(PHYCLK_USBDRD300_UDRD30_PIPE_PCLK_USER,
/linux-6.3-rc2/arch/arm64/boot/dts/exynos/
A Dexynos7.dtsi686 <&clock_fsys0 PHYCLK_USBDRD300_UDRD30_PIPE_PCLK_USER>,

Completed in 7 milliseconds