Home
last modified time | relevance | path

Searched refs:PHY_STATUS (Results 1 – 14 of 14) sorted by relevance

/linux-6.3-rc2/drivers/net/ethernet/intel/igc/
A Digc_phy.c74 ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &phy_status); in igc_phy_has_link()
85 ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &phy_status); in igc_phy_has_link()
406 ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &phy_status); in igc_wait_autoneg()
409 ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &phy_status); in igc_wait_autoneg()
A Digc_mac.c481 ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, in igc_config_fc_after_link_up()
485 ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, in igc_config_fc_after_link_up()
A Digc_defines.h610 #define PHY_STATUS 0x01 /* Status Register */ macro
/linux-6.3-rc2/drivers/net/ethernet/intel/e1000/
A De1000_hw.c1465 ret_val = e1000_read_phy_reg(hw, PHY_STATUS, &phy_data); in e1000_setup_copper_link()
1468 ret_val = e1000_read_phy_reg(hw, PHY_STATUS, &phy_data); in e1000_setup_copper_link()
1778 e1000_read_phy_reg(hw, PHY_STATUS, &mii_status_reg); in e1000_phy_force_speed_duplex()
1783 e1000_read_phy_reg(hw, PHY_STATUS, &mii_status_reg); in e1000_phy_force_speed_duplex()
1812 e1000_read_phy_reg(hw, PHY_STATUS, &mii_status_reg); in e1000_phy_force_speed_duplex()
2406 ret_val = e1000_read_phy_reg(hw, PHY_STATUS, &phy_data); in e1000_check_for_link()
2409 ret_val = e1000_read_phy_reg(hw, PHY_STATUS, &phy_data); in e1000_check_for_link()
2630 ret_val = e1000_read_phy_reg(hw, PHY_STATUS, &phy_data); in e1000_wait_autoneg()
2633 ret_val = e1000_read_phy_reg(hw, PHY_STATUS, &phy_data); in e1000_wait_autoneg()
3403 ret_val = e1000_read_phy_reg(hw, PHY_STATUS, &phy_data); in e1000_phy_get_info()
[all …]
A De1000_hw.h2482 #define PHY_STATUS 0x01 /* Status Register */ macro
/linux-6.3-rc2/drivers/gpu/drm/hisilicon/kirin/
A Ddw_dsi_reg.h62 #define PHY_STATUS 0xB0 /* D-PHY PPI status interface */ macro
A Ddw_drm_dsi.c436 val = readl(base + PHY_STATUS); in dsi_set_mipi_phy()
/linux-6.3-rc2/drivers/pci/controller/dwc/
A Dpcie-artpec6.c75 #define PHY_STATUS 0x118 macro
162 val = readl(artpec6_pcie->phy_base + PHY_STATUS); in artpec6_pcie_wait_for_phy_a6()
/linux-6.3-rc2/drivers/phy/freescale/
A Dphy-fsl-imx8qm-lvds-phy.c42 #define PHY_STATUS 0x10 macro
129 ret = regmap_read_poll_timeout(priv->regmap, PHY_STATUS, locked, in mixel_lvds_phy_power_on()
/linux-6.3-rc2/drivers/net/ethernet/oki-semi/pch_gbe/
A Dpch_gbe_phy.c17 #define PHY_STATUS 0x01 /* Status Regiser */ macro
/linux-6.3-rc2/drivers/net/ethernet/intel/igb/
A De1000_phy.c1596 ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &phy_status); in igb_wait_autoneg()
1599 ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &phy_status); in igb_wait_autoneg()
1633 ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &phy_status); in igb_phy_has_link()
1644 ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, &phy_status); in igb_phy_has_link()
A De1000_mac.c935 ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, in igb_config_fc_after_link_up()
939 ret_val = hw->phy.ops.read_reg(hw, PHY_STATUS, in igb_config_fc_after_link_up()
A De1000_defines.h695 #define PHY_STATUS 0x01 /* Status Register */ macro
/linux-6.3-rc2/drivers/gpu/drm/sprd/
A Dsprd_dsi.c93 #define PHY_STATUS 0x9C macro
230 if (dsi_reg_rd(ctx, PHY_STATUS, PHY_LOCK, 1)) in dphy_wait_pll_locked()

Completed in 54 milliseconds