Searched refs:PIC32_CLR (Results 1 – 9 of 9) sorted by relevance
| /linux-6.3-rc2/drivers/tty/serial/ |
| A D | pic32_uart.c | 156 pic32_uart_writel(sport, PIC32_CLR(PIC32_UART_MODE), in pic32_uart_set_mctrl()
213 pic32_uart_writel(sport, PIC32_CLR(PIC32_UART_STA), in pic32_uart_stop_tx()
237 pic32_uart_writel(sport, PIC32_CLR(PIC32_UART_STA), in pic32_uart_stop_rx()
253 pic32_uart_writel(sport, PIC32_CLR(PIC32_UART_STA), in pic32_uart_break_ctl()
291 pic32_uart_writel(sport, PIC32_CLR(PIC32_UART_STA), in pic32_uart_do_rx()
447 pic32_uart_writel(sport, PIC32_CLR(PIC32_UART_STA), in pic32_uart_dsbl_and_mask()
449 pic32_uart_writel(sport, PIC32_CLR(PIC32_UART_MODE), in pic32_uart_dsbl_and_mask()
546 pic32_uart_writel(sport, PIC32_CLR(PIC32_UART_STA), in pic32_uart_startup()
550 pic32_uart_writel(sport, PIC32_CLR(PIC32_UART_STA), in pic32_uart_startup()
618 pic32_uart_writel(sport, PIC32_CLR(PIC32_UART_MODE), in pic32_uart_set_termios()
[all …]
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| /linux-6.3-rc2/drivers/irqchip/ |
| A D | irq-pic32-evic.c | 67 writel(BIT(bit), evic_base + PIC32_CLR(REG_INTCON)); in pic32_set_ext_polarity()
113 evic_base + PIC32_CLR(REG_IPC_OFFSET + reg * 0x10)); in pic32_set_irq_priority()
151 iecclr = PIC32_CLR(REG_IEC_OFFSET + reg * 0x10); in pic32_irq_domain_map()
152 ifsclr = PIC32_CLR(REG_IFS_OFFSET + reg * 0x10); in pic32_irq_domain_map()
257 u32 ifsclr = PIC32_CLR(REG_IFS_OFFSET + (i * 0x10)); in pic32_of_init()
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| /linux-6.3-rc2/drivers/rtc/ |
| A D | rtc-pic32.c | 107 PIC32_CLR(PIC32_RTCALRM))); in pic32_rtc_setaie()
123 writel(PIC32_RTCALRM_AMASK, base + PIC32_CLR(PIC32_RTCALRM)); in pic32_rtc_setfreq()
274 writel(PIC32_RTCCON_ON, base + PIC32_CLR(PIC32_RTCCON)); in pic32_rtc_enable()
279 writel(3 << 9, base + PIC32_CLR(PIC32_RTCCON)); in pic32_rtc_enable()
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| /linux-6.3-rc2/drivers/watchdog/ |
| A D | pic32-dmt.c | 55 writel(DMT_ON, PIC32_CLR(dmt->regs + DMTCON_REG)); in dmt_disable()
119 writel(RESETCON_DMT_TIMEOUT, PIC32_CLR(rst_base)); in pic32_dmt_bootstatus()
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| A D | pic32-wdt.c | 68 writel(RESETCON_WDT_TIMEOUT, PIC32_CLR(wdt->rst_base)); in pic32_wdt_bootstatus()
121 writel(WDTCON_ON, PIC32_CLR(wdt->regs + WDTCON_REG)); in pic32_wdt_stop()
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| /linux-6.3-rc2/arch/mips/include/asm/mach-pic32/ |
| A D | pic32.h | 14 #define PIC32_CLR(_reg) ((_reg) + 0x04) macro
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| /linux-6.3-rc2/arch/mips/pic32/pic32mzda/ |
| A D | config.c | 112 writel(-1, PIC32_CLR(pic32_conf_base + PIC32_RCON)); in pic32_config_init()
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| /linux-6.3-rc2/drivers/clk/microchip/ |
| A D | clk-core.c | 116 writel(PB_DIV_ENABLE, PIC32_CLR(pb->ctrl_reg)); in pbclk_disable()
266 writel(REFO_ON | REFO_OE, PIC32_CLR(refo->ctrl_reg)); in roclk_disable()
530 writel(REFO_ON, PIC32_CLR(refo->ctrl_reg)); in roclk_set_rate_and_parent()
982 writel(sosc->enable_mask, PIC32_CLR(sosc->enable_reg)); in sosc_clk_disable()
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| /linux-6.3-rc2/drivers/pinctrl/ |
| A D | pinctrl-pic32.c | 1808 writel(mask, bank->reg_base + PIC32_CLR(ANSEL_REG)); in pic32_gpio_request_enable()
1840 writel(mask, bank->reg_base + PIC32_CLR(PORT_REG)); in pic32_gpio_set()
1850 writel(mask, bank->reg_base + PIC32_CLR(TRIS_REG)); in pic32_gpio_direction_output()
1948 writel(mask, bank->reg_base + PIC32_CLR(ANSEL_REG)); in pic32_pinconf_set()
2010 writel(BIT(PIC32_CNCON_ON), bank->reg_base + PIC32_CLR(CNCON_REG)); in pic32_gpio_irq_mask()
2040 writel(mask, bank->reg_base + PIC32_CLR(CNNE_REG)); in pic32_gpio_irq_set_type()
2046 writel(mask, bank->reg_base + PIC32_CLR(CNEN_REG)); in pic32_gpio_irq_set_type()
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