Searched refs:PLL_HPLL (Results 1 – 17 of 17) sorted by relevance
| /linux-6.3-rc2/arch/arm64/boot/dts/rockchip/ |
| A D | rk3566-radxa-cm3-io.dts | 259 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
|
| A D | rk3566-box-demo.dts | 469 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
|
| A D | rk3566-lubancat-1.dts | 582 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
|
| A D | rk3566-roc-pc.dts | 688 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
|
| A D | rk3566-soquartz.dtsi | 678 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
|
| A D | rk3568-evb1-v10.dts | 679 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
|
| A D | rk3568-lubancat-2.dts | 682 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
|
| A D | rk3566-quartz64-b.dts | 726 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
|
| A D | rk3568-odroid-m1.dts | 731 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
|
| A D | rk3568-bpi-r2-pro.dts | 842 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
|
| A D | rk3566-anbernic-rgxx3.dtsi | 773 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
|
| A D | rk3568-rock-3a.dts | 845 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
|
| A D | rk3566-quartz64-a.dts | 826 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
|
| /linux-6.3-rc2/include/dt-bindings/clock/ |
| A D | rockchip,rv1126-cru.h | 68 #define PLL_HPLL 4 macro
|
| A D | rk3568-cru.h | 14 #define PLL_HPLL 2 macro
|
| /linux-6.3-rc2/drivers/clk/rockchip/ |
| A D | clk-rv1126.c | 205 [hpll] = PLL(pll_rk3328, PLL_HPLL, "hpll", mux_pll_p,
|
| A D | clk-rk3568.c | 315 [hpll] = PLL(pll_rk3328, PLL_HPLL, "hpll", mux_pll_p,
|
Completed in 37 milliseconds