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Searched refs:PLL_PPLL (Results 1 – 11 of 11) sorted by relevance

/linux-6.3-rc2/arch/arm64/boot/dts/rockchip/
A Drk3566-anbernic-rg353x.dtsi19 assigned-clocks = <&cru PLL_GPLL>, <&pmucru PLL_PPLL>, <&cru PLL_VPLL>;
A Drk3566-anbernic-rg503.dts108 assigned-clocks = <&cru PLL_GPLL>, <&pmucru PLL_PPLL>, <&cru PLL_VPLL>;
A Drk3588s.dtsi407 <&cru PLL_PPLL>, <&cru PLL_AUPLL>,
A Drk356x.dtsi425 assigned-clocks = <&pmucru CLK_RTC_32K>, <&cru PLL_GPLL>, <&pmucru PLL_PPLL>;
A Drk3399.dtsi1463 assigned-clocks = <&pmucru PLL_PPLL>;
/linux-6.3-rc2/include/dt-bindings/clock/
A Drk3399-cru.h342 #define PLL_PPLL 1 macro
A Drockchip,rk3588-cru.h23 #define PLL_PPLL 8 macro
A Drk3568-cru.h13 #define PLL_PPLL 1 macro
/linux-6.3-rc2/drivers/clk/rockchip/
A Dclk-rk3399.c236 [ppll] = PLL(pll_rk3399, PLL_PPLL, "ppll", mux_pll_p, 0, RK3399_PMU_PLL_CON(0),
A Dclk-rk3568.c312 [ppll] = PLL(pll_rk3328, PLL_PPLL, "ppll", mux_pll_p,
A Dclk-rk3588.c682 [ppll] = PLL(pll_rk3588_core, PLL_PPLL, "ppll", mux_pll_p,

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