Searched refs:PLL_PPLL (Results 1 – 11 of 11) sorted by relevance
/linux-6.3-rc2/arch/arm64/boot/dts/rockchip/ |
A D | rk3566-anbernic-rg353x.dtsi | 19 assigned-clocks = <&cru PLL_GPLL>, <&pmucru PLL_PPLL>, <&cru PLL_VPLL>;
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A D | rk3566-anbernic-rg503.dts | 108 assigned-clocks = <&cru PLL_GPLL>, <&pmucru PLL_PPLL>, <&cru PLL_VPLL>;
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A D | rk3588s.dtsi | 407 <&cru PLL_PPLL>, <&cru PLL_AUPLL>,
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A D | rk356x.dtsi | 425 assigned-clocks = <&pmucru CLK_RTC_32K>, <&cru PLL_GPLL>, <&pmucru PLL_PPLL>;
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A D | rk3399.dtsi | 1463 assigned-clocks = <&pmucru PLL_PPLL>;
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/linux-6.3-rc2/include/dt-bindings/clock/ |
A D | rk3399-cru.h | 342 #define PLL_PPLL 1 macro
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A D | rockchip,rk3588-cru.h | 23 #define PLL_PPLL 8 macro
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A D | rk3568-cru.h | 13 #define PLL_PPLL 1 macro
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/linux-6.3-rc2/drivers/clk/rockchip/ |
A D | clk-rk3399.c | 236 [ppll] = PLL(pll_rk3399, PLL_PPLL, "ppll", mux_pll_p, 0, RK3399_PMU_PLL_CON(0),
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A D | clk-rk3568.c | 312 [ppll] = PLL(pll_rk3328, PLL_PPLL, "ppll", mux_pll_p,
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A D | clk-rk3588.c | 682 [ppll] = PLL(pll_rk3588_core, PLL_PPLL, "ppll", mux_pll_p,
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