1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Copyright (C) ST-Ericsson SA 2010-2013
4  * Author: Rickard Andersson <rickard.andersson@stericsson.com> for
5  *         ST-Ericsson.
6  * Author: Daniel Lezcano <daniel.lezcano@linaro.org> for Linaro.
7  * Author: Ulf Hansson <ulf.hansson@linaro.org> for Linaro.
8  */
9 
10 #include <linux/kernel.h>
11 #include <linux/irqchip/arm-gic.h>
12 #include <linux/delay.h>
13 #include <linux/io.h>
14 #include <linux/suspend.h>
15 #include <linux/platform_data/arm-ux500-pm.h>
16 #include <linux/of.h>
17 #include <linux/of_address.h>
18 
19 /* ARM WFI Standby signal register */
20 #define PRCM_ARM_WFI_STANDBY    (prcmu_base + 0x130)
21 #define PRCM_ARM_WFI_STANDBY_WFI0		0x08
22 #define PRCM_ARM_WFI_STANDBY_WFI1		0x10
23 #define PRCM_IOCR		(prcmu_base + 0x310)
24 #define PRCM_IOCR_IOFORCE			0x1
25 
26 /* Dual A9 core interrupt management unit registers */
27 #define PRCM_A9_MASK_REQ	(prcmu_base + 0x328)
28 #define PRCM_A9_MASK_REQ_PRCM_A9_MASK_REQ	0x1
29 
30 #define PRCM_A9_MASK_ACK	(prcmu_base + 0x32c)
31 #define PRCM_ARMITMSK31TO0	(prcmu_base + 0x11c)
32 #define PRCM_ARMITMSK63TO32	(prcmu_base + 0x120)
33 #define PRCM_ARMITMSK95TO64	(prcmu_base + 0x124)
34 #define PRCM_ARMITMSK127TO96	(prcmu_base + 0x128)
35 #define PRCM_POWER_STATE_VAL	(prcmu_base + 0x25C)
36 #define PRCM_ARMITVAL31TO0	(prcmu_base + 0x260)
37 #define PRCM_ARMITVAL63TO32	(prcmu_base + 0x264)
38 #define PRCM_ARMITVAL95TO64	(prcmu_base + 0x268)
39 #define PRCM_ARMITVAL127TO96	(prcmu_base + 0x26C)
40 
41 static void __iomem *prcmu_base;
42 static void __iomem *dist_base;
43 
44 /* This function decouple the gic from the prcmu */
prcmu_gic_decouple(void)45 int prcmu_gic_decouple(void)
46 {
47 	u32 val = readl(PRCM_A9_MASK_REQ);
48 
49 	/* Set bit 0 register value to 1 */
50 	writel(val | PRCM_A9_MASK_REQ_PRCM_A9_MASK_REQ,
51 	       PRCM_A9_MASK_REQ);
52 
53 	/* Make sure the register is updated */
54 	readl(PRCM_A9_MASK_REQ);
55 
56 	/* Wait a few cycles for the gic mask completion */
57 	udelay(1);
58 
59 	return 0;
60 }
61 
62 /* This function recouple the gic with the prcmu */
prcmu_gic_recouple(void)63 int prcmu_gic_recouple(void)
64 {
65 	u32 val = readl(PRCM_A9_MASK_REQ);
66 
67 	/* Set bit 0 register value to 0 */
68 	writel(val & ~PRCM_A9_MASK_REQ_PRCM_A9_MASK_REQ, PRCM_A9_MASK_REQ);
69 
70 	return 0;
71 }
72 
73 #define PRCMU_GIC_NUMBER_REGS 5
74 
75 /*
76  * This function checks if there are pending irq on the gic. It only
77  * makes sense if the gic has been decoupled before with the
78  * db8500_prcmu_gic_decouple function. Disabling an interrupt only
79  * disables the forwarding of the interrupt to any CPU interface. It
80  * does not prevent the interrupt from changing state, for example
81  * becoming pending, or active and pending if it is already
82  * active. Hence, we have to check the interrupt is pending *and* is
83  * active.
84  */
prcmu_gic_pending_irq(void)85 bool prcmu_gic_pending_irq(void)
86 {
87 	u32 pr; /* Pending register */
88 	u32 er; /* Enable register */
89 	int i;
90 
91 	/* 5 registers. STI & PPI not skipped */
92 	for (i = 0; i < PRCMU_GIC_NUMBER_REGS; i++) {
93 
94 		pr = readl_relaxed(dist_base + GIC_DIST_PENDING_SET + i * 4);
95 		er = readl_relaxed(dist_base + GIC_DIST_ENABLE_SET + i * 4);
96 
97 		if (pr & er)
98 			return true; /* There is a pending interrupt */
99 	}
100 
101 	return false;
102 }
103 
104 /*
105  * This function checks if there are pending interrupt on the
106  * prcmu which has been delegated to monitor the irqs with the
107  * db8500_prcmu_copy_gic_settings function.
108  */
prcmu_pending_irq(void)109 bool prcmu_pending_irq(void)
110 {
111 	u32 it, im;
112 	int i;
113 
114 	for (i = 0; i < PRCMU_GIC_NUMBER_REGS - 1; i++) {
115 		it = readl(PRCM_ARMITVAL31TO0 + i * 4);
116 		im = readl(PRCM_ARMITMSK31TO0 + i * 4);
117 		if (it & im)
118 			return true; /* There is a pending interrupt */
119 	}
120 
121 	return false;
122 }
123 
124 /*
125  * This function checks if the specified cpu is in WFI. It's usage
126  * makes sense only if the gic is decoupled with the db8500_prcmu_gic_decouple
127  * function. Of course passing smp_processor_id() to this function will
128  * always return false...
129  */
prcmu_is_cpu_in_wfi(int cpu)130 bool prcmu_is_cpu_in_wfi(int cpu)
131 {
132 	return readl(PRCM_ARM_WFI_STANDBY) &
133 		(cpu ? PRCM_ARM_WFI_STANDBY_WFI1 : PRCM_ARM_WFI_STANDBY_WFI0);
134 }
135 
136 /*
137  * This function copies the gic SPI settings to the prcmu in order to
138  * monitor them and abort/finish the retention/off sequence or state.
139  */
prcmu_copy_gic_settings(void)140 int prcmu_copy_gic_settings(void)
141 {
142 	u32 er; /* Enable register */
143 	int i;
144 
145 	/* We skip the STI and PPI */
146 	for (i = 0; i < PRCMU_GIC_NUMBER_REGS - 1; i++) {
147 		er = readl_relaxed(dist_base +
148 				   GIC_DIST_ENABLE_SET + (i + 1) * 4);
149 		writel(er, PRCM_ARMITMSK31TO0 + i * 4);
150 	}
151 
152 	return 0;
153 }
154 
155 #ifdef CONFIG_SUSPEND
ux500_suspend_enter(suspend_state_t state)156 static int ux500_suspend_enter(suspend_state_t state)
157 {
158 	cpu_do_idle();
159 	return 0;
160 }
161 
ux500_suspend_valid(suspend_state_t state)162 static int ux500_suspend_valid(suspend_state_t state)
163 {
164 	return state == PM_SUSPEND_MEM || state == PM_SUSPEND_STANDBY;
165 }
166 
167 static const struct platform_suspend_ops ux500_suspend_ops = {
168 	.enter	      = ux500_suspend_enter,
169 	.valid	      = ux500_suspend_valid,
170 };
171 #define UX500_SUSPEND_OPS	(&ux500_suspend_ops)
172 #else
173 #define UX500_SUSPEND_OPS	NULL
174 #endif
175 
ux500_pm_init(u32 phy_base,u32 size)176 void __init ux500_pm_init(u32 phy_base, u32 size)
177 {
178 	struct device_node *np;
179 
180 	prcmu_base = ioremap(phy_base, size);
181 	if (!prcmu_base) {
182 		pr_err("could not remap PRCMU for PM functions\n");
183 		return;
184 	}
185 	np = of_find_compatible_node(NULL, NULL, "arm,cortex-a9-gic");
186 	dist_base = of_iomap(np, 0);
187 	of_node_put(np);
188 	if (!dist_base) {
189 		pr_err("could not remap GIC dist base for PM functions\n");
190 		return;
191 	}
192 
193 	/*
194 	 * On watchdog reboot the GIC is in some cases decoupled.
195 	 * This will make sure that the GIC is correctly configured.
196 	 */
197 	prcmu_gic_recouple();
198 
199 	/* Set up ux500 suspend callbacks. */
200 	suspend_set_ops(UX500_SUSPEND_OPS);
201 }
202