/linux-6.3-rc2/arch/hexagon/kernel/ |
A D | vm_entry.S | 70 R2 = and(R0,R2); } \ 215 R0 = R29; \ 232 R0 = usr; \ 236 R0 = setbit(R0, #16); \ 238 usr = R0; \ 246 R0 = R29; \ 274 R0 = #VM_INT_DISABLE define 287 R0 = #VM_INT_DISABLE; define 308 R0 = #VM_INT_DISABLE; define 331 R0 = R29 define [all …]
|
A D | vm_switch.S | 55 memw(R0+#_TASK_THREAD_INFO) = THREADINFO_REG; 56 memw(R0 +#(_TASK_STRUCT_THREAD + _THREAD_STRUCT_SWITCH_SP)) = R29;
|
/linux-6.3-rc2/lib/ |
A D | test_bpf.c | 1947 else if (R0 == rd || R0 == rs) in __bpf_fill_atomic_reg_pairs() 3808 BPF_ALU64_REG(BPF_ADD, R0, R0), 4092 BPF_ALU64_REG(BPF_SUB, R0, R0), 4215 BPF_ALU64_REG(BPF_SUB, R0, R0), 4263 BPF_ALU64_REG(BPF_XOR, R0, R0), 4267 BPF_ALU64_REG(BPF_XOR, R0, R0), 4291 BPF_ALU64_REG(BPF_MUL, R0, R0), 4363 BPF_ALU64_REG(BPF_ADD, R0, R0), 4403 BPF_ALU64_REG(BPF_ADD, R0, R0), 4443 BPF_ALU64_REG(BPF_ADD, R0, R0), [all …]
|
/linux-6.3-rc2/arch/x86/crypto/ |
A D | twofish-x86_64-asm_64.S | 29 #define R0 %rax macro 226 encrypt_round(R0,R1,R2,R3,0); 227 encrypt_round(R2,R3,R0,R1,8); 228 encrypt_round(R0,R1,R2,R3,2*8); 229 encrypt_round(R2,R3,R0,R1,3*8); 230 encrypt_round(R0,R1,R2,R3,4*8); 231 encrypt_round(R2,R3,R0,R1,5*8); 232 encrypt_round(R0,R1,R2,R3,6*8); 233 encrypt_round(R2,R3,R0,R1,7*8); 248 xor R0, R1 [all …]
|
A D | twofish-i586-asm_32.S | 231 encrypt_round(R0,R1,R2,R3,0); 232 encrypt_round(R2,R3,R0,R1,8); 233 encrypt_round(R0,R1,R2,R3,2*8); 234 encrypt_round(R2,R3,R0,R1,3*8); 235 encrypt_round(R0,R1,R2,R3,4*8); 236 encrypt_round(R2,R3,R0,R1,5*8); 237 encrypt_round(R0,R1,R2,R3,6*8); 238 encrypt_round(R2,R3,R0,R1,7*8); 239 encrypt_round(R0,R1,R2,R3,8*8); 240 encrypt_round(R2,R3,R0,R1,9*8); [all …]
|
A D | poly1305-x86_64-cryptogams.pl | 2298 vpmuludq $T1,$R0,$M1 2313 vpmuludq $T2,$R0,$M2 2399 vpermd $R0,$M0,$R0 # 14243444 -> 1---2---3---4--- 2595 vpsrlq \$32,$R0,$R0 # 0105020603070408 3099 vmovdqa $R0,$H0 3171 vpunpcklqdq $R0,$H0,$R0 3188 vinserti128 \$1,%x#$R0,$H0,$R0 3192 vpermq \$0b11011000,$R0,$R0 3206 vpbroadcastq %x#$R0,$R0 # broadcast 4th power 3220 vpsrldq \$8,$R0,$R0 # 0-1-0-2 [all …]
|
/linux-6.3-rc2/arch/arm/crypto/ |
A D | poly1305-armv4.pl | 554 vmull.u32 $D0,$R0,${R0}[1] 1064 vmull.u32 $D2,$H2#hi,$R0 1066 vmull.u32 $D0,$H0#hi,$R0 1068 vmull.u32 $D3,$H3#hi,$R0 1070 vmull.u32 $D1,$H1#hi,$R0 1072 vmull.u32 $D4,$H4#hi,$R0 1116 vmlal.u32 $D2,$H2#lo,$R0 1117 vmlal.u32 $D0,$H0#lo,$R0 1118 vmlal.u32 $D3,$H3#lo,$R0 1119 vmlal.u32 $D1,$H1#lo,$R0 [all …]
|
/linux-6.3-rc2/Documentation/devicetree/bindings/pinctrl/ |
A D | mediatek,pinctrl-mt6795.yaml | 102 description: mt6795 pull down PUPD/R0/R1 type define value. 112 description: mt6795 pull up PUPD/R0/R1 type define value. 134 Pull up setings for 2 pull resistors, R0 and R1. User can 136 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled. 137 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled. 138 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled. 139 3: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled. 147 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled. 148 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled. 149 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled. [all …]
|
A D | mediatek,mt6779-pinctrl.yaml | 161 Pull up setings for 2 pull resistors, R0 and R1. User can 163 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled. 164 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled. 165 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled. 166 3: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled. 172 Pull down settings for 2 pull resistors, R0 and R1. User can 174 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled. 175 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled. 176 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled. 177 3: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled.
|
A D | mediatek,mt8365-pinctrl.yaml | 77 settings for 2 pull resistors, R0 and R1. User can configure those 122 Pull up setings for 2 pull resistors, R0 and R1. User can 124 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled. 125 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled. 126 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled. 127 3: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled. 133 Pull down settings for 2 pull resistors, R0 and R1. User can 135 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled. 136 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled. 137 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled. [all …]
|
A D | mediatek,mt8183-pinctrl.yaml | 141 Pull up setings for 2 pull resistors, R0 and R1. User can 143 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled. 144 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled. 145 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled. 146 3: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled. 152 Pull down settings for 2 pull resistors, R0 and R1. User can 154 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled. 155 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled. 156 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled. 157 3: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled.
|
A D | mediatek,mt7981-pinctrl.yaml | 352 PUPD/R1/R0 pull down type. See MTK_PUPD_SET_R1R0 defines in 361 PUPD/R1/R0 pull down type. See MTK_PUPD_SET_R1R0 defines in 384 Pull up setings for 2 pull resistors, R0 and R1. Valid arguments 386 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled. 387 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled. 388 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled. 389 3: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled. 398 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled. 399 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled. 400 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled. [all …]
|
A D | mediatek,mt7986-pinctrl.yaml | 301 PUPD/R1/R0 pull down type. See MTK_PUPD_SET_R1R0 defines in 310 PUPD/R1/R0 pull down type. See MTK_PUPD_SET_R1R0 defines in 333 Pull up setings for 2 pull resistors, R0 and R1. Valid arguments 335 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled. 336 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled. 337 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled. 338 3: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled. 347 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled. 348 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled. 349 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled. [all …]
|
A D | pinctrl-mt8186.yaml | 117 description: mt8186 pull down PUPD/R0/R1 type define value. 125 For pull down type is PUPD/R0/R1 type, it can add R1R0 define to 162 description: mt8186 pull up PUPD/R0/R1 type define value. 170 For pull up type is PUPD/R0/R1 type, it can add R1R0 define to
|
A D | mediatek,mt8188-pinctrl.yaml | 103 description: mt8188 pull down PUPD/R0/R1 type define value. 111 For pull down type is PUPD/R0/R1 type, it can add R1R0 define to 126 description: mt8188 pull up PUPD/R0/R1 type define value. 134 For pull up type is PUPD/R0/R1 type, it can add R1R0 define to
|
/linux-6.3-rc2/arch/arm64/crypto/ |
A D | poly1305-armv8.pl | 577 umull $ACC0,$IN23_0,${R0}[2] 760 umull2 $ACC2,$IN23_2,${R0} 764 umlal2 $ACC0,$IN23_0,${R0} 775 umlal2 $ACC1,$IN23_1,${R0} 778 umlal2 $ACC3,$IN23_3,${R0} 786 umlal2 $ACC4,$IN23_4,${R0} 800 umlal $ACC2,$IN01_2,${R0} 804 umlal $ACC0,$IN01_0,${R0} 813 umlal $ACC1,$IN01_1,${R0} 817 umlal $ACC3,$IN01_3,${R0} [all …]
|
/linux-6.3-rc2/arch/sh/kernel/cpu/sh3/ |
A D | swsusp.S | 59 ! BL=0: R7->R0 is bank0 65 ! BL=1: R7->R0 is bank1 80 ! BL=0: R7->R0 is bank0 105 ! BL=0: R7->R0 is bank0 112 ! BL=1: R7->R0 is bank1 119 ! BL=0: R7->R0 is bank0
|
/linux-6.3-rc2/drivers/tty/serial/ |
A D | pmac_zilog.c | 162 write_zsreg(uap, R0, RES_EXT_INT); in pmz_load_zsregs() 163 write_zsreg(uap, R0, RES_EXT_INT); in pmz_load_zsregs() 230 write_zsreg(uap, R0, ERR_RES); in pmz_receive_chars() 303 ch = read_zsreg(uap, R0); in pmz_receive_chars() 319 status = read_zsreg(uap, R0); in pmz_status_handle() 421 write_zsreg(uap, R0, RES_Tx_P); in pmz_transmit_chars() 501 status = read_zsreg(uap, R0); in pmz_peek_status() 573 status = read_zsreg(uap, R0); in pmz_get_mctrl() 608 status = read_zsreg(uap, R0); in pmz_start_tx() 831 write_zsreg(uap, R0, ERR_RES); in __pmz_startup() [all …]
|
A D | zs.c | 324 status_a = read_zsreg(zport_a, R0); in zs_raw_get_ab_mctrl() 325 status_b = read_zsreg(zport_b, R0); in zs_raw_get_ab_mctrl() 421 write_zsreg(zport, R0, RES_Tx_P); in zs_raw_stop_tx() 498 write_zsreg(zport_a, R0, RES_EXT_INT); in zs_enable_ms() 572 write_zsreg(zport, R0, ERR_RES); in zs_receive_chars() 655 status = read_zsreg(zport, R0); in zs_status_handle() 692 write_zsreg(zport, R0, RES_EXT_INT); in zs_status_handle() 777 write_zsreg(zport, R0, ERR_RES); in zs_startup() 778 write_zsreg(zport, R0, RES_Tx_P); in zs_startup() 781 write_zsreg(zport, R0, RES_EXT_INT); in zs_startup() [all …]
|
/linux-6.3-rc2/arch/sh/math-emu/ |
A D | math.c | 50 #define R0 (regs->regs[0]) macro 160 MREAD(FRn, Rm + R0 + 4); in fmov_idx_reg() 162 MREAD(FRn, Rm + R0); in fmov_idx_reg() 164 MREAD(FRn, Rm + R0); in fmov_idx_reg() 210 MWRITE(FRm, Rn + R0 + 4); in fmov_reg_idx() 212 MWRITE(FRm, Rn + R0); in fmov_reg_idx() 214 MWRITE(FRm, Rn + R0); in fmov_reg_idx()
|
/linux-6.3-rc2/tools/perf/arch/arm/tests/ |
A D | regs_load.S | 4 #define R0 0x00 macro 41 str r0, [r0, #R0]
|
/linux-6.3-rc2/Documentation/bpf/ |
A D | linux-notes.rst | 36 * Register R0 is an implicit output which contains the data fetched from 47 R0 = ntohl(*(u32 *) ((struct sk_buff *) R6->data + imm)) 53 R0 = ntohl(*(u32 *) ((struct sk_buff *) R6->data + src + imm))
|
A D | classic_vs_extended.rst | 30 R0 - R5 are scratch registers and eBPF program needs spill/fill them if 74 After an in-kernel function call, R1 - R5 are reset to unreadable and R0 has 118 R0 - rax 141 bpf_mov R7, R0 /* save foo() return value */ 148 bpf_add R0, R7 186 registers and place their return value into ``%rax`` which is R0 in eBPF. 188 interpreter. R0-R5 are scratch registers, so eBPF program needs to preserve 195 bpf_mov R0, R1 340 value into register R0 before doing a BPF_EXIT. Class 6 in eBPF is used as
|
/linux-6.3-rc2/tools/perf/arch/powerpc/tests/ |
A D | regs_load.S | 5 #define R0 0 macro 44 std 0, R0(3)
|
/linux-6.3-rc2/arch/powerpc/mm/nohash/ |
A D | tlb_low.S | 244 PPC_TLBILX_ALL(0,R0) 257 PPC_TLBILX_PID(0,R0) 309 PPC_TLBILX_PID(0,R0) 321 PPC_TLBILX_PID(0,R0) 328 PPC_TLBILX_ALL(0,R0)
|