Home
last modified time | relevance | path

Searched refs:R9A07G044_CLK_P0_DIV2 (Results 1 – 3 of 3) sorted by relevance

/linux-6.3-rc2/include/dt-bindings/clock/
A Dr9a07g044-cpg.h33 #define R9A07G044_CLK_P0_DIV2 22 macro
/linux-6.3-rc2/drivers/clk/renesas/
A Dr9a07g044-cpg.c156 DEF_FIXED("P0_DIV2", R9A07G044_CLK_P0_DIV2, R9A07G044_CLK_P0, 1, 2),
/linux-6.3-rc2/arch/arm64/boot/dts/renesas/
A Dr9a07g044.dtsi445 <&cpg CPG_CORE R9A07G044_CLK_P0_DIV2>,
448 assigned-clocks = <&cpg CPG_CORE R9A07G044_CLK_P0_DIV2>;

Completed in 6 milliseconds