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Searched refs:REGBASE (Results 1 – 6 of 6) sorted by relevance

/linux-6.3-rc2/drivers/net/wan/
A Dwanxlfw.S88 REGBASE = DPRBASE + 0x1000 define
89 PICR = REGBASE + 0x026 // 16-bit periodic irq control
90 PITR = REGBASE + 0x02A // 16-bit periodic irq timing
91 OR1 = REGBASE + 0x064 // 32-bit RAM bank #1 options
93 CIMR = REGBASE + 0x548 // 32-bit CP interrupt mask
105 CR = REGBASE + 0x5C0 // 16-bit Command register
107 SCC1_REGS = REGBASE + 0x600
108 SCC2_REGS = REGBASE + 0x620
109 SCC3_REGS = REGBASE + 0x640
110 SCC4_REGS = REGBASE + 0x660
[all …]
/linux-6.3-rc2/arch/mips/include/asm/mach-rc32434/
A Dirq.h11 #define IC_GROUP0_PEND (REGBASE + 0x38000)
12 #define IC_GROUP0_MASK (REGBASE + 0x38008)
A Drb.h10 #define REGBASE 0x18000000 macro
11 #define IDT434_REG_BASE ((volatile void *) KSEG1ADDR(REGBASE))
/linux-6.3-rc2/arch/mips/rb532/
A Dgpio.c58 .start = REGBASE + GPIOBASE,
59 .end = REGBASE + GPIOBASE + sizeof(struct rb532_gpio_reg) - 1,
A Dserial.c44 .membase = (char *)KSEG1ADDR(REGBASE + UART0BASE),
A Ddevices.c215 .membase = (char *)KSEG1ADDR(REGBASE + UART0BASE),

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