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Searched refs:REG_CLR_FLD (Results 1 – 2 of 2) sorted by relevance

/linux-6.3-rc2/drivers/accel/ivpu/
A Divpu_hw_mtl.c276 val = REG_CLR_FLD(MTL_VPU_HOST_SS_CPR_RST_SET, TOP_NOC, val); in ivpu_boot_host_ss_rst_drive()
277 val = REG_CLR_FLD(MTL_VPU_HOST_SS_CPR_RST_SET, DSS_MAS, val); in ivpu_boot_host_ss_rst_drive()
278 val = REG_CLR_FLD(MTL_VPU_HOST_SS_CPR_RST_SET, MSS_MAS, val); in ivpu_boot_host_ss_rst_drive()
293 val = REG_CLR_FLD(MTL_VPU_HOST_SS_CPR_CLK_SET, TOP_NOC, val); in ivpu_boot_host_ss_clk_drive()
294 val = REG_CLR_FLD(MTL_VPU_HOST_SS_CPR_CLK_SET, DSS_MAS, val); in ivpu_boot_host_ss_clk_drive()
295 val = REG_CLR_FLD(MTL_VPU_HOST_SS_CPR_CLK_SET, MSS_MAS, val); in ivpu_boot_host_ss_clk_drive()
385 val = REG_CLR_FLD(MTL_VPU_HOST_SS_NOC_QREQN, TOP_SOCMMIO, val); in ivpu_boot_host_ss_axi_drive()
421 val = REG_CLR_FLD(MTL_VPU_TOP_NOC_QREQN, CPU_CTRL, val); in ivpu_boot_host_ss_top_noc_drive()
422 val = REG_CLR_FLD(MTL_VPU_TOP_NOC_QREQN, HOSTIF_L2CACHE, val); in ivpu_boot_host_ss_top_noc_drive()
490 val = REG_CLR_FLD(MTL_VPU_HOST_SS_AON_PWR_ISO_EN0, MSS_CPU, val); in ivpu_boot_pwr_island_isolation_drive()
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A Divpu_hw_reg_io.h39 #define REG_CLR_FLD(REG, FLD, val) \ macro

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