Searched refs:REG_DSI_14nm_PHY_CMN_CTRL_1 (Results 1 – 2 of 2) sorted by relevance
86 #define REG_DSI_14nm_PHY_CMN_CTRL_1 0x00000020 macro
375 dsi_phy_write_udelay(cmn_base + REG_DSI_14nm_PHY_CMN_CTRL_1, 0x20, 10); in pll_14nm_software_reset()378 dsi_phy_write(cmn_base + REG_DSI_14nm_PHY_CMN_CTRL_1, 0); in pll_14nm_software_reset()993 dsi_phy_write(base + REG_DSI_14nm_PHY_CMN_CTRL_1, 0x80); in dsi_14nm_phy_enable()996 dsi_phy_write(base + REG_DSI_14nm_PHY_CMN_CTRL_1, 0x00); in dsi_14nm_phy_enable()
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