Searched refs:REG_DSI_28nm_PHY_PLL_CAL_CFG11 (Results 1 – 2 of 2) sorted by relevance
350 #define REG_DSI_28nm_PHY_PLL_CAL_CFG11 0x00000098 macro
225 dsi_phy_write(base + REG_DSI_28nm_PHY_PLL_CAL_CFG11, cal_cfg11 & 0xff); in dsi_pll_28nm_clk_set_rate()
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