Searched refs:REG_DSI_28nm_PHY_PLL_LKDET_CFG2 (Results 1 – 2 of 2) sorted by relevance
200 dsi_phy_write(base + REG_DSI_28nm_PHY_PLL_LKDET_CFG2, 0x0d); in dsi_pll_28nm_clk_set_rate()318 dsi_phy_write_udelay(base + REG_DSI_28nm_PHY_PLL_LKDET_CFG2, in _dsi_pll_28nm_vco_prepare_hpm()320 dsi_phy_write(base + REG_DSI_28nm_PHY_PLL_LKDET_CFG2, 0x0d); in _dsi_pll_28nm_vco_prepare_hpm()413 dsi_phy_write_ndelay(base + REG_DSI_28nm_PHY_PLL_LKDET_CFG2, 0x04, 500); in dsi_pll_28nm_vco_prepare_lp()414 dsi_phy_write_udelay(base + REG_DSI_28nm_PHY_PLL_LKDET_CFG2, 0x05, 512); in dsi_pll_28nm_vco_prepare_lp()
323 #define REG_DSI_28nm_PHY_PLL_LKDET_CFG2 0x00000064 macro
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