Searched refs:REG_DSI_28nm_PHY_PLL_LPFC1_CFG (Results 1 – 2 of 2) sorted by relevance
266 #define REG_DSI_28nm_PHY_PLL_LPFC1_CFG 0x00000030 macro
144 dsi_phy_write(base + REG_DSI_28nm_PHY_PLL_LPFC1_CFG, 0x70); in dsi_pll_28nm_clk_set_rate()
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