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Searched refs:REG_GENMASK (Results 1 – 17 of 17) sorted by relevance

/linux-6.3-rc2/drivers/gpu/drm/i915/display/
A Dintel_snps_phy_regs.h23 #define SNPS_PHY_MPLLB_CP_INT REG_GENMASK(31, 25)
24 #define SNPS_PHY_MPLLB_CP_INT_GS REG_GENMASK(23, 17)
25 #define SNPS_PHY_MPLLB_CP_PROP REG_GENMASK(15, 9)
26 #define SNPS_PHY_MPLLB_CP_PROP_GS REG_GENMASK(7, 1)
32 #define SNPS_PHY_MPLLB_V2I REG_GENMASK(27, 26)
33 #define SNPS_PHY_MPLLB_FREQ_VCO REG_GENMASK(25, 24)
38 #define SNPS_PHY_MPLLB_TX_CLK_DIV REG_GENMASK(7, 5)
44 #define SNPS_PHY_MPLLB_FRACN_DEN REG_GENMASK(15, 0)
71 #define SNPS_PHY_TX_EQ_MAIN REG_GENMASK(23, 18)
72 #define SNPS_PHY_TX_EQ_POST REG_GENMASK(15, 10)
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A Dintel_audio_regs.h13 #define G4X_ELD_BUFFER_SIZE_MASK REG_GENMASK(13, 9)
14 #define G4X_ELD_ADDRESS_MASK REG_GENMASK(8, 5)
26 #define IBX_ELD_BUFFER_SIZE_MASK REG_GENMASK(14, 10)
27 #define IBX_ELD_ADDRESS_MASK REG_GENMASK(9, 5)
60 #define AUD_CONFIG_UPPER_N_MASK REG_GENMASK(27, 20)
61 #define AUD_CONFIG_LOWER_N_MASK REG_GENMASK(15, 4)
66 #define AUD_CONFIG_PIXEL_CLOCK_HDMI_MASK REG_GENMASK(19, 16)
96 #define AUD_CONFIG_M_MASK REG_GENMASK(19, 0)
A Dintel_dvo_regs.h18 #define DVO_PIPE_STALL_MASK REG_GENMASK(29, 28)
24 #define DVO_PRESERVE_MASK REG_GENMASK(25, 24)
49 #define DVO_SRCDIM_HORIZONTAL_MASK REG_GENMASK(22, 12)
51 #define DVO_SRCDIM_VERTICAL_MASK REG_GENMASK(10, 0)
A Dintel_dkl_phy_regs.h59 #define DKL_PLL_DIV0_AFC_STARTUP_MASK REG_GENMASK(27, 25)
150 #define DKL_TX_DPCNTL2_CFG_LOADGENSELECT_TX1_MASK REG_GENMASK(4, 3)
152 #define DKL_TX_DPCNTL2_CFG_LOADGENSELECT_TX2_MASK REG_GENMASK(6, 5)
A Dintel_dmc_regs.h55 #define DMC_EVT_CTL_TYPE_MASK REG_GENMASK(17, 16)
61 #define DMC_EVT_CTL_EVENT_ID_MASK REG_GENMASK(15, 8)
A Dicl_dsi_regs.h33 #define TX_ESC_CLK_DIV_PHY_MASK REG_GENMASK(23, 16)
101 #define TGL_DSI_CHKN_LSHS_GB_MASK REG_GENMASK(15, 12)
109 #define DSI_T_INIT_MASTER_MASK REG_GENMASK(15, 0)
A Dintel_hti_regs.h12 #define HDPORT_DPLL_USED_MASK REG_GENMASK(15, 12)
A Dintel_combo_phy_regs.h155 #define ICL_PORT_TX_DW8_ODCC_CLK_DIV_SEL_MASK REG_GENMASK(30, 29)
/linux-6.3-rc2/drivers/gpu/drm/i915/
A Dintel_mchbar_regs.h82 #define MLTR_WM2_MASK REG_GENMASK(13, 8)
83 #define MLTR_WM1_MASK REG_GENMASK(5, 0)
127 #define DG1_DRAM_T_RP_MASK REG_GENMASK(6, 0)
204 #define PKG_PWR_UNIT REG_GENMASK(3, 0)
205 #define PKG_ENERGY_UNIT REG_GENMASK(12, 8)
206 #define PKG_TIME_UNIT REG_GENMASK(19, 16)
212 #define RP0_CAP_MASK REG_GENMASK(7, 0)
213 #define RP1_CAP_MASK REG_GENMASK(15, 8)
214 #define RPN_CAP_MASK REG_GENMASK(23, 16)
217 #define RPE_MASK REG_GENMASK(15, 8)
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A Di915_reg.h615 #define PORT_PLL_N_MASK REG_GENMASK(11, 8)
1354 #define FBC_STRIDE_MASK REG_GENMASK(14, 0)
1752 #define MTL_RPE_MASK REG_GENMASK(8, 0)
1974 #define EXITLINE_MASK REG_GENMASK(12, 0)
2117 #define TGL_PSR_MASK REG_GENMASK(2, 0)
3459 #define TU_SIZE_MASK REG_GENMASK(30, 25)
4601 #define SPCSC_C0_MASK REG_GENMASK(14, 0)
4617 #define SPCSC_OMIN_MASK REG_GENMASK(9, 0)
5780 #define GMD_ID_STEP REG_GENMASK(5, 0)
7735 #define GMS_MASK REG_GENMASK(15, 8)
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A Di915_reg_defs.h34 #define REG_GENMASK(__high, __low) \ macro
/linux-6.3-rc2/drivers/gpu/drm/i915/gt/
A Dintel_gt_regs.h27 #define MTL_CAGF_MASK REG_GENMASK(8, 0)
30 #define MTL_CC_MASK REG_GENMASK(12, 9)
84 #define MTL_MCR_GROUPID REG_GENMASK(11, 8)
85 #define MTL_MCR_INSTANCEID REG_GENMASK(3, 0)
295 #define VERT_WM_VAL REG_GENMASK(9, 0)
560 #define GT_L3_EXC_MASK REG_GENMASK(6, 4)
924 #define MSG_IDLE_FW_MASK REG_GENMASK(13, 9)
1183 #define THROTTLE_12_5 REG_GENMASK(4, 2)
1197 #define STACKID_CTRL REG_GENMASK(6, 5)
1222 #define COMP_CKN_IN REG_GENMASK(30, 29)
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A Dintel_gpu_commands.h131 #define MI_SEMAPHORE_TOKEN_MASK REG_GENMASK(9, 5)
245 #define XY_FAST_COPY_BLT_D0_SRC_TILING_MASK REG_GENMASK(21, 20)
246 #define XY_FAST_COPY_BLT_D0_DST_TILING_MASK REG_GENMASK(14, 13)
258 #define BLIT_CCTL_SRC_MOCS_MASK REG_GENMASK(6, 0)
259 #define BLIT_CCTL_DST_MOCS_MASK REG_GENMASK(14, 8)
A Dintel_engine_regs.h131 #define BLIT_CCTL_DST_MOCS_MASK REG_GENMASK(14, 8)
132 #define BLIT_CCTL_SRC_MOCS_MASK REG_GENMASK(6, 0)
148 #define CMD_CCTL_WRITE_OVERRIDE_MASK REG_GENMASK(13, 7)
149 #define CMD_CCTL_READ_OVERRIDE_MASK REG_GENMASK(6, 0)
208 #define RING_FORCE_TO_NONPRIV_ADDRESS_MASK REG_GENMASK(25, 2)
/linux-6.3-rc2/drivers/gpu/drm/i915/gt/uc/abi/
A Dguc_actions_slpc_abi.h168 #define SLPC_MAX_UNSLICE_FREQ_MASK REG_GENMASK(7, 0)
169 #define SLPC_MIN_UNSLICE_FREQ_MASK REG_GENMASK(15, 8)
170 #define SLPC_MAX_SLICE_FREQ_MASK REG_GENMASK(23, 16)
171 #define SLPC_MIN_SLICE_FREQ_MASK REG_GENMASK(31, 24)
/linux-6.3-rc2/drivers/gpu/drm/i915/gt/uc/
A Dintel_gsc_fw.c13 #define GSC_FW_CURRENT_STATE REG_GENMASK(3, 0)
/linux-6.3-rc2/drivers/gpu/drm/i915/gvt/
A Dhandlers.c768 u32 reg_nonpriv = (*(u32 *)p_data) & REG_GENMASK(25, 2); in force_nonpriv_write()

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