REG_SET_FIELD (reference) in projects: linux-6.3-rc2

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Searched refs:REG_SET_FIELD (Results 1 – 25 of 95) sorted by relevance

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/linux-6.3-rc2/drivers/gpu/drm/amd/amdgpu/
A D	gfxhub_v3_0.c	219 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL, in gfxhub_v3_0_init_cache_regs() 222 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL, in gfxhub_v3_0_init_cache_regs() 237 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL3, in gfxhub_v3_0_init_cache_regs() 241 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL3, in gfxhub_v3_0_init_cache_regs() 263 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT0_CNTL, in gfxhub_v3_0_enable_system_domain() 302 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v3_0_setup_vmid_config() 304 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v3_0_setup_vmid_config() 306 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v3_0_setup_vmid_config() 308 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v3_0_setup_vmid_config() 310 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v3_0_setup_vmid_config() [all …]
A D	gfxhub_v3_0_3.c	224 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL, in gfxhub_v3_0_3_init_cache_regs() 227 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL, in gfxhub_v3_0_3_init_cache_regs() 242 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL3, in gfxhub_v3_0_3_init_cache_regs() 246 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL3, in gfxhub_v3_0_3_init_cache_regs() 268 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT0_CNTL, in gfxhub_v3_0_3_enable_system_domain() 307 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v3_0_3_setup_vmid_config() 309 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v3_0_3_setup_vmid_config() 311 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v3_0_3_setup_vmid_config() 313 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v3_0_3_setup_vmid_config() 315 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v3_0_3_setup_vmid_config() [all …]
A D	gfxhub_v2_0.c	217 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL, in gfxhub_v2_0_init_cache_regs() 220 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL, in gfxhub_v2_0_init_cache_regs() 235 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL3, in gfxhub_v2_0_init_cache_regs() 239 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL3, in gfxhub_v2_0_init_cache_regs() 261 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT0_CNTL, in gfxhub_v2_0_enable_system_domain() 294 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v2_0_setup_vmid_config() 296 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v2_0_setup_vmid_config() 298 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v2_0_setup_vmid_config() 300 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v2_0_setup_vmid_config() 302 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v2_0_setup_vmid_config() [all …]
A D	mmhub_v3_0_2.c	237 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL, in mmhub_v3_0_2_init_cache_regs() 255 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL3, in mmhub_v3_0_2_init_cache_regs() 259 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL3, in mmhub_v3_0_2_init_cache_regs() 281 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT0_CNTL, in mmhub_v3_0_2_enable_system_domain() 323 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_0_2_setup_vmid_config() 325 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_0_2_setup_vmid_config() 328 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_0_2_setup_vmid_config() 330 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_0_2_setup_vmid_config() 332 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_0_2_setup_vmid_config() 334 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_0_2_setup_vmid_config() [all …]
A D	gfxhub_v1_0.c	196 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, in gfxhub_v1_0_init_cache_regs() 200 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, in gfxhub_v1_0_init_cache_regs() 226 tmp = REG_SET_FIELD(tmp, VM_CONTEXT0_CNTL, in gfxhub_v1_0_enable_system_domain() 267 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, in gfxhub_v1_0_setup_vmid_config() 269 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, in gfxhub_v1_0_setup_vmid_config() 272 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, in gfxhub_v1_0_setup_vmid_config() 274 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, in gfxhub_v1_0_setup_vmid_config() 276 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, in gfxhub_v1_0_setup_vmid_config() 278 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, in gfxhub_v1_0_setup_vmid_config() 357 tmp = REG_SET_FIELD(tmp, in gfxhub_v1_0_gart_disable() [all …]
A D	mmhub_v3_0_1.c	238 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL, in mmhub_v3_0_1_init_cache_regs() 256 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL3, in mmhub_v3_0_1_init_cache_regs() 260 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL3, in mmhub_v3_0_1_init_cache_regs() 282 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT0_CNTL, in mmhub_v3_0_1_enable_system_domain() 318 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_0_1_setup_vmid_config() 320 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_0_1_setup_vmid_config() 323 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_0_1_setup_vmid_config() 325 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_0_1_setup_vmid_config() 327 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_0_1_setup_vmid_config() 329 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_0_1_setup_vmid_config() [all …]
A D	mmhub_v3_0.c	245 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL, in mmhub_v3_0_init_cache_regs() 263 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL3, in mmhub_v3_0_init_cache_regs() 267 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL3, in mmhub_v3_0_init_cache_regs() 289 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT0_CNTL, in mmhub_v3_0_enable_system_domain() 331 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_0_setup_vmid_config() 333 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_0_setup_vmid_config() 336 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_0_setup_vmid_config() 338 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_0_setup_vmid_config() 340 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_0_setup_vmid_config() 342 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v3_0_setup_vmid_config() [all …]
A D	mmhub_v2_0.c	288 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL, in mmhub_v2_0_init_cache_regs() 306 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL3, in mmhub_v2_0_init_cache_regs() 310 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL3, in mmhub_v2_0_init_cache_regs() 332 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT0_CNTL, in mmhub_v2_0_enable_system_domain() 374 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v2_0_setup_vmid_config() 376 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v2_0_setup_vmid_config() 379 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v2_0_setup_vmid_config() 381 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v2_0_setup_vmid_config() 383 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v2_0_setup_vmid_config() 385 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v2_0_setup_vmid_config() [all …]
A D	mmhub_v2_3.c	212 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL, in mmhub_v2_3_init_cache_regs() 230 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL3, in mmhub_v2_3_init_cache_regs() 234 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL3, in mmhub_v2_3_init_cache_regs() 256 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT0_CNTL, in mmhub_v2_3_enable_system_domain() 292 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v2_3_setup_vmid_config() 294 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v2_3_setup_vmid_config() 297 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v2_3_setup_vmid_config() 299 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v2_3_setup_vmid_config() 301 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v2_3_setup_vmid_config() 303 tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT1_CNTL, in mmhub_v2_3_setup_vmid_config() [all …]
A D	hdp_v6_0.c	56 hdp_clk_cntl = REG_SET_FIELD(hdp_clk_cntl, HDP_CLK_CNTL, in hdp_v6_0_update_clock_gating() 61 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, HDP_MEM_POWER_CTRL, in hdp_v6_0_update_clock_gating() 63 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, HDP_MEM_POWER_CTRL, in hdp_v6_0_update_clock_gating() 65 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, HDP_MEM_POWER_CTRL, in hdp_v6_0_update_clock_gating() 83 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, in hdp_v6_0_update_clock_gating() 86 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, in hdp_v6_0_update_clock_gating() 90 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, in hdp_v6_0_update_clock_gating() 93 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, in hdp_v6_0_update_clock_gating() 97 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, in hdp_v6_0_update_clock_gating() 100 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, in hdp_v6_0_update_clock_gating() [all …]
A D	hdp_v5_2.c	58 hdp_clk_cntl = REG_SET_FIELD(hdp_clk_cntl, HDP_CLK_CNTL, in hdp_v5_2_update_mem_power_gating() 60 hdp_clk_cntl = REG_SET_FIELD(hdp_clk_cntl, HDP_CLK_CNTL, in hdp_v5_2_update_mem_power_gating() 65 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, HDP_MEM_POWER_CTRL, in hdp_v5_2_update_mem_power_gating() 87 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, in hdp_v5_2_update_mem_power_gating() 90 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, in hdp_v5_2_update_mem_power_gating() 94 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, in hdp_v5_2_update_mem_power_gating() 97 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, in hdp_v5_2_update_mem_power_gating() 101 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, in hdp_v5_2_update_mem_power_gating() 104 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, in hdp_v5_2_update_mem_power_gating() 121 hdp_clk_cntl = REG_SET_FIELD(hdp_clk_cntl, HDP_CLK_CNTL, in hdp_v5_2_update_mem_power_gating() [all …]
A D	hdp_v5_0.c	67 hdp_clk_cntl = REG_SET_FIELD(hdp_clk_cntl, HDP_CLK_CNTL, in hdp_v5_0_update_mem_power_gating() 69 hdp_clk_cntl = REG_SET_FIELD(hdp_clk_cntl, HDP_CLK_CNTL, in hdp_v5_0_update_mem_power_gating() 97 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, in hdp_v5_0_update_mem_power_gating() 100 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, in hdp_v5_0_update_mem_power_gating() 104 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, in hdp_v5_0_update_mem_power_gating() 107 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, in hdp_v5_0_update_mem_power_gating() 111 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, in hdp_v5_0_update_mem_power_gating() 116 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, in hdp_v5_0_update_mem_power_gating() 120 hdp_mem_pwr_cntl = REG_SET_FIELD(hdp_mem_pwr_cntl, in hdp_v5_0_update_mem_power_gating() 138 hdp_clk_cntl = REG_SET_FIELD(hdp_clk_cntl, HDP_CLK_CNTL, in hdp_v5_0_update_mem_power_gating() [all …]
A D	lsdma_v6_0.c	56 tmp = REG_SET_FIELD(tmp, LSDMA_PIO_COMMAND, BYTE_COUNT, size); in lsdma_v6_0_copy_mem() 57 tmp = REG_SET_FIELD(tmp, LSDMA_PIO_COMMAND, SRC_LOCATION, 0); in lsdma_v6_0_copy_mem() 58 tmp = REG_SET_FIELD(tmp, LSDMA_PIO_COMMAND, DST_LOCATION, 0); in lsdma_v6_0_copy_mem() 59 tmp = REG_SET_FIELD(tmp, LSDMA_PIO_COMMAND, SRC_ADDR_INC, 0); in lsdma_v6_0_copy_mem() 60 tmp = REG_SET_FIELD(tmp, LSDMA_PIO_COMMAND, DST_ADDR_INC, 0); in lsdma_v6_0_copy_mem() 62 tmp = REG_SET_FIELD(tmp, LSDMA_PIO_COMMAND, CONSTANT_FILL, 0); in lsdma_v6_0_copy_mem() 88 tmp = REG_SET_FIELD(tmp, LSDMA_PIO_COMMAND, BYTE_COUNT, size); in lsdma_v6_0_fill_mem() 89 tmp = REG_SET_FIELD(tmp, LSDMA_PIO_COMMAND, SRC_LOCATION, 0); in lsdma_v6_0_fill_mem() 90 tmp = REG_SET_FIELD(tmp, LSDMA_PIO_COMMAND, DST_LOCATION, 0); in lsdma_v6_0_fill_mem() 91 tmp = REG_SET_FIELD(tmp, LSDMA_PIO_COMMAND, SRC_ADDR_INC, 0); in lsdma_v6_0_fill_mem() [all …]
A D	ih_v6_0.c	101 ih_cntl = REG_SET_FIELD(ih_cntl, IH_CNTL2, in force_update_wptr_for_self_int() 103 ih_cntl = REG_SET_FIELD(ih_cntl, IH_CNTL2, in force_update_wptr_for_self_int() 191 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, in ih_v6_0_rb_cntl() 193 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, in ih_v6_0_rb_cntl() 312 ih_chicken = REG_SET_FIELD(ih_chicken, in ih_v6_0_irq_init() 345 tmp = REG_SET_FIELD(tmp, IH_MSI_STORM_CTRL, in ih_v6_0_irq_init() 627 data = REG_SET_FIELD(data, IH_CLK_CTRL, in ih_v6_0_update_clockgating_state() 629 data = REG_SET_FIELD(data, IH_CLK_CTRL, in ih_v6_0_update_clockgating_state() 631 data = REG_SET_FIELD(data, IH_CLK_CTRL, in ih_v6_0_update_clockgating_state() 633 data = REG_SET_FIELD(data, IH_CLK_CTRL, in ih_v6_0_update_clockgating_state() [all …]
A D	gfxhub_v2_1.c	220 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL, in gfxhub_v2_1_init_cache_regs() 223 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL, in gfxhub_v2_1_init_cache_regs() 238 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL3, in gfxhub_v2_1_init_cache_regs() 242 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL3, in gfxhub_v2_1_init_cache_regs() 264 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT0_CNTL, in gfxhub_v2_1_enable_system_domain() 303 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v2_1_setup_vmid_config() 305 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v2_1_setup_vmid_config() 307 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v2_1_setup_vmid_config() 309 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v2_1_setup_vmid_config() 311 tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL, in gfxhub_v2_1_setup_vmid_config() [all …]
A D	mmhub_v1_0.c	182 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, in mmhub_v1_0_init_cache_regs() 186 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL3, in mmhub_v1_0_init_cache_regs() 204 tmp = REG_SET_FIELD(tmp, VM_CONTEXT0_CNTL, in mmhub_v1_0_enable_system_domain() 249 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, in mmhub_v1_0_setup_vmid_config() 251 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, in mmhub_v1_0_setup_vmid_config() 254 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, in mmhub_v1_0_setup_vmid_config() 256 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, in mmhub_v1_0_setup_vmid_config() 258 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, in mmhub_v1_0_setup_vmid_config() 260 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, in mmhub_v1_0_setup_vmid_config() 353 tmp = REG_SET_FIELD(tmp, in mmhub_v1_0_gart_disable() [all …]
A D	gmc_v7_0.c	101 blackout = REG_SET_FIELD(blackout, in gmc_v7_0_mc_stop() 522 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, in gmc_v7_0_set_fault_enable_default() 524 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, in gmc_v7_0_set_fault_enable_default() 526 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, in gmc_v7_0_set_fault_enable_default() 553 tmp = REG_SET_FIELD(tmp, VM_PRT_CNTL, in gmc_v7_0_set_prt() 555 tmp = REG_SET_FIELD(tmp, VM_PRT_CNTL, in gmc_v7_0_set_prt() 557 tmp = REG_SET_FIELD(tmp, VM_PRT_CNTL, in gmc_v7_0_set_prt() 559 tmp = REG_SET_FIELD(tmp, VM_PRT_CNTL, in gmc_v7_0_set_prt() 561 tmp = REG_SET_FIELD(tmp, VM_PRT_CNTL, in gmc_v7_0_set_prt() 563 tmp = REG_SET_FIELD(tmp, VM_PRT_CNTL, in gmc_v7_0_set_prt() [all …]
A D	dce_v10_0.c	247 tmp = REG_SET_FIELD(tmp, GRPH_FLIP_CONTROL, in dce_v10_0_page_flip() 360 tmp = REG_SET_FIELD(tmp, DC_HPD_CONTROL, DC_HPD_EN, 1); in dce_v10_0_hpd_init() 364 tmp = REG_SET_FIELD(tmp, DC_HPD_TOGGLE_FILT_CNTL, in dce_v10_0_hpd_init() 367 tmp = REG_SET_FIELD(tmp, DC_HPD_TOGGLE_FILT_CNTL, in dce_v10_0_hpd_init() 402 tmp = REG_SET_FIELD(tmp, DC_HPD_CONTROL, DC_HPD_EN, 0); in dce_v10_0_hpd_fini() 2024 tmp = REG_SET_FIELD(tmp, GRPH_FLIP_CONTROL, in dce_v10_0_crtc_do_set_base() 2305 tmp = REG_SET_FIELD(tmp, CUR_CONTROL, CURSOR_EN, 0); in dce_v10_0_hide_cursor() 2321 tmp = REG_SET_FIELD(tmp, CUR_CONTROL, CURSOR_EN, 1); in dce_v10_0_show_cursor() 2322 tmp = REG_SET_FIELD(tmp, CUR_CONTROL, CURSOR_MODE, 2); in dce_v10_0_show_cursor() 3231 tmp = REG_SET_FIELD(tmp, LB_VBLANK_STATUS, VBLANK_ACK, 1); in dce_v10_0_crtc_vblank_int_ack() [all …]
A D	gmc_v8_0.c	190 blackout = REG_SET_FIELD(blackout, in gmc_v8_0_mc_stop() 743 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, in gmc_v8_0_set_fault_enable_default() 745 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, in gmc_v8_0_set_fault_enable_default() 747 tmp = REG_SET_FIELD(tmp, VM_CONTEXT1_CNTL, in gmc_v8_0_set_fault_enable_default() 776 tmp = REG_SET_FIELD(tmp, VM_PRT_CNTL, in gmc_v8_0_set_prt() 778 tmp = REG_SET_FIELD(tmp, VM_PRT_CNTL, in gmc_v8_0_set_prt() 780 tmp = REG_SET_FIELD(tmp, VM_PRT_CNTL, in gmc_v8_0_set_prt() 782 tmp = REG_SET_FIELD(tmp, VM_PRT_CNTL, in gmc_v8_0_set_prt() 784 tmp = REG_SET_FIELD(tmp, VM_PRT_CNTL, in gmc_v8_0_set_prt() 786 tmp = REG_SET_FIELD(tmp, VM_PRT_CNTL, in gmc_v8_0_set_prt() [all …]
A D	nbio_v7_7.c	73 doorbell_range = REG_SET_FIELD(doorbell_range, in nbio_v7_7_sdma_doorbell_range() 76 doorbell_range = REG_SET_FIELD(doorbell_range, in nbio_v7_7_sdma_doorbell_range() 80 doorbell_range = REG_SET_FIELD(doorbell_range, in nbio_v7_7_sdma_doorbell_range() 95 doorbell_range = REG_SET_FIELD(doorbell_range, in nbio_v7_7_vcn_doorbell_range() 98 doorbell_range = REG_SET_FIELD(doorbell_range, in nbio_v7_7_vcn_doorbell_range() 101 doorbell_range = REG_SET_FIELD(doorbell_range, in nbio_v7_7_vcn_doorbell_range() 153 ih_doorbell_range = REG_SET_FIELD(ih_doorbell_range, in nbio_v7_7_ih_doorbell_range() 156 ih_doorbell_range = REG_SET_FIELD(ih_doorbell_range, in nbio_v7_7_ih_doorbell_range() 160 ih_doorbell_range = REG_SET_FIELD(ih_doorbell_range, in nbio_v7_7_ih_doorbell_range() 242 data = REG_SET_FIELD(data, BIF0_PCIE_MST_CTRL_3, in nbio_v7_7_init_registers() [all …]
A D	vega20_ih.c	166 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, in vega20_ih_rb_cntl() 168 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, in vega20_ih_rb_cntl() 170 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, in vega20_ih_rb_cntl() 176 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, in vega20_ih_rb_cntl() 644 data = REG_SET_FIELD(data, IH_CLK_CTRL, in vega20_ih_update_clockgating_state() 646 data = REG_SET_FIELD(data, IH_CLK_CTRL, in vega20_ih_update_clockgating_state() 648 data = REG_SET_FIELD(data, IH_CLK_CTRL, in vega20_ih_update_clockgating_state() 650 data = REG_SET_FIELD(data, IH_CLK_CTRL, in vega20_ih_update_clockgating_state() 652 data = REG_SET_FIELD(data, IH_CLK_CTRL, in vega20_ih_update_clockgating_state() 654 data = REG_SET_FIELD(data, IH_CLK_CTRL, in vega20_ih_update_clockgating_state() [all …]
A D	dce_v11_0.c	265 tmp = REG_SET_FIELD(tmp, GRPH_FLIP_CONTROL, in dce_v11_0_page_flip() 378 tmp = REG_SET_FIELD(tmp, DC_HPD_CONTROL, DC_HPD_EN, 1); in dce_v11_0_hpd_init() 382 tmp = REG_SET_FIELD(tmp, DC_HPD_TOGGLE_FILT_CNTL, in dce_v11_0_hpd_init() 385 tmp = REG_SET_FIELD(tmp, DC_HPD_TOGGLE_FILT_CNTL, in dce_v11_0_hpd_init() 419 tmp = REG_SET_FIELD(tmp, DC_HPD_CONTROL, DC_HPD_EN, 0); in dce_v11_0_hpd_fini() 2066 tmp = REG_SET_FIELD(tmp, GRPH_FLIP_CONTROL, in dce_v11_0_crtc_do_set_base() 2381 tmp = REG_SET_FIELD(tmp, CUR_CONTROL, CURSOR_EN, 0); in dce_v11_0_hide_cursor() 2397 tmp = REG_SET_FIELD(tmp, CUR_CONTROL, CURSOR_EN, 1); in dce_v11_0_show_cursor() 2398 tmp = REG_SET_FIELD(tmp, CUR_CONTROL, CURSOR_MODE, 2); in dce_v11_0_show_cursor() 3354 tmp = REG_SET_FIELD(tmp, LB_VBLANK_STATUS, VBLANK_ACK, 1); in dce_v11_0_crtc_vblank_int_ack() [all …]
A D	nbio_v7_2.c	116 doorbell_range = REG_SET_FIELD(doorbell_range, in nbio_v7_2_sdma_doorbell_range() 119 doorbell_range = REG_SET_FIELD(doorbell_range, in nbio_v7_2_sdma_doorbell_range() 123 doorbell_range = REG_SET_FIELD(doorbell_range, in nbio_v7_2_sdma_doorbell_range() 138 doorbell_range = REG_SET_FIELD(doorbell_range, in nbio_v7_2_vcn_doorbell_range() 141 doorbell_range = REG_SET_FIELD(doorbell_range, in nbio_v7_2_vcn_doorbell_range() 144 doorbell_range = REG_SET_FIELD(doorbell_range, in nbio_v7_2_vcn_doorbell_range() 195 ih_doorbell_range = REG_SET_FIELD(ih_doorbell_range, in nbio_v7_2_ih_doorbell_range() 377 data = REG_SET_FIELD(data, BIF1_PCIE_MST_CTRL_3, in nbio_v7_2_init_registers() 379 data = REG_SET_FIELD(data, BIF1_PCIE_MST_CTRL_3, in nbio_v7_2_init_registers() 387 data = REG_SET_FIELD(data, PCIE_CONFIG_CNTL, in nbio_v7_2_init_registers() [all …]
A D	navi10_ih.c	116 ih_cntl = REG_SET_FIELD(ih_cntl, IH_CNTL2, in force_update_wptr_for_self_int() 118 ih_cntl = REG_SET_FIELD(ih_cntl, IH_CNTL2, in force_update_wptr_for_self_int() 217 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, in navi10_ih_rb_cntl() 219 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, in navi10_ih_rb_cntl() 338 ih_chicken = REG_SET_FIELD(ih_chicken, in navi10_ih_irq_init() 344 ih_chicken = REG_SET_FIELD(ih_chicken, in navi10_ih_irq_init() 655 data = REG_SET_FIELD(data, IH_CLK_CTRL, in navi10_ih_update_clockgating_state() 657 data = REG_SET_FIELD(data, IH_CLK_CTRL, in navi10_ih_update_clockgating_state() 659 data = REG_SET_FIELD(data, IH_CLK_CTRL, in navi10_ih_update_clockgating_state() 661 data = REG_SET_FIELD(data, IH_CLK_CTRL, in navi10_ih_update_clockgating_state() [all …]
A D	nbio_v4_3.c	72 doorbell_range = REG_SET_FIELD(doorbell_range, in nbio_v4_3_sdma_doorbell_range() 76 doorbell_range = REG_SET_FIELD(doorbell_range, in nbio_v4_3_sdma_doorbell_range() 80 doorbell_range = REG_SET_FIELD(doorbell_range, in nbio_v4_3_sdma_doorbell_range() 84 doorbell_range = REG_SET_FIELD(doorbell_range, in nbio_v4_3_sdma_doorbell_range() 88 doorbell_range = REG_SET_FIELD(doorbell_range, in nbio_v4_3_sdma_doorbell_range() 113 doorbell_range = REG_SET_FIELD(doorbell_range, in nbio_v4_3_vcn_doorbell_range() 117 doorbell_range = REG_SET_FIELD(doorbell_range, in nbio_v4_3_vcn_doorbell_range() 121 doorbell_range = REG_SET_FIELD(doorbell_range, in nbio_v4_3_vcn_doorbell_range() 125 doorbell_range = REG_SET_FIELD(doorbell_range, in nbio_v4_3_vcn_doorbell_range() 129 doorbell_range = REG_SET_FIELD(doorbell_range, in nbio_v4_3_vcn_doorbell_range() [all …]

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