RREG64_PCIE (reference) in projects: linux-6.3-rc2

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Searched refs:RREG64_PCIE (Results 1 – 6 of 6) sorted by relevance

/linux-6.3-rc2/drivers/gpu/drm/amd/amdgpu/
A D	umc_v6_7.c	75 reg_value = RREG64_PCIE((mc_umc_addr + umc_reg_offset) * 4); in umc_v6_7_query_error_status_helper() 82 reg_value = RREG64_PCIE((mc_umc_addr + umc_reg_offset) * 4); in umc_v6_7_query_error_status_helper() 89 reg_value = RREG64_PCIE((mc_umc_addr + umc_reg_offset) * 4); in umc_v6_7_query_error_status_helper() 309 mc_umc_status = RREG64_PCIE((mc_umc_status_addr + umc_reg_offset) * 4); in umc_v6_7_query_correctable_error_count() 327 err_addr = RREG64_PCIE((mc_umc_addrt0 + umc_reg_offset) * 4); in umc_v6_7_query_correctable_error_count() 354 mc_umc_status = RREG64_PCIE((mc_umc_status_addr + umc_reg_offset) * 4); in umc_v6_7_querry_uncorrectable_error_count() 463 mc_umc_status = RREG64_PCIE((mc_umc_status_addr + umc_reg_offset) * 4); in umc_v6_7_query_error_address() 477 err_addr = RREG64_PCIE((mc_umc_addrt0 + umc_reg_offset) * 4); in umc_v6_7_query_error_address()
A D	amdgpu_mca.c	`34 uint64_t mc_status = RREG64_PCIE(mc_status_addr); in amdgpu_mca_query_correctable_error_count() 45 uint64_t mc_status = RREG64_PCIE(mc_status_addr); in amdgpu_mca_query_uncorrectable_error_count()`
A D	umc_v6_1.c	`219 mc_umc_status = RREG64_PCIE((mc_umc_status_addr + umc_reg_offset) * 4); in umc_v6_1_query_correctable_error_count() 244 mc_umc_status = RREG64_PCIE((mc_umc_status_addr + umc_reg_offset) * 4); in umc_v6_1_querry_uncorrectable_error_count() 319 mc_umc_status = RREG64_PCIE((mc_umc_status_addr + umc_reg_offset) * 4); in umc_v6_1_query_error_address() 334 err_addr = RREG64_PCIE((mc_umc_addrt0 + umc_reg_offset) * 4); in umc_v6_1_query_error_address()`
A D	umc_v8_7.c	`274 mc_umc_status = RREG64_PCIE((mc_umc_status_addr + umc_reg_offset) * 4); in umc_v8_7_query_correctable_error_count() 291 mc_umc_status = RREG64_PCIE((mc_umc_status_addr + umc_reg_offset) * 4); in umc_v8_7_querry_uncorrectable_error_count() 339 mc_umc_status = RREG64_PCIE((mc_umc_status_addr + umc_reg_offset) * 4); in umc_v8_7_query_error_address() 354 err_addr = RREG64_PCIE((mc_umc_addrt0 + umc_reg_offset) * 4); in umc_v8_7_query_error_address()`
A D	umc_v8_10.c	`124 mc_umc_status = RREG64_PCIE((mc_umc_status_addr + umc_reg_offset) * 4); in umc_v8_10_query_correctable_error_count() 140 mc_umc_status = RREG64_PCIE((mc_umc_status_addr + umc_reg_offset) * 4); in umc_v8_10_query_uncorrectable_error_count() 264 mc_umc_status = RREG64_PCIE((mc_umc_status_addr + umc_reg_offset) * 4); in umc_v8_10_query_error_address() 281 err_addr = RREG64_PCIE((mc_umc_addrt0 + umc_reg_offset) * 4); in umc_v8_10_query_error_address()`
A D	amdgpu.h	`1165 #define RREG64_PCIE(reg) adev->pcie_rreg64(adev, (reg)) macro`

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