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Searched refs:RST_BUS_MMC0 (Results 1 – 25 of 33) sorted by relevance

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/linux-6.3-rc2/include/dt-bindings/reset/
A Dsun8i-v3s-ccu.h55 #define RST_BUS_MMC0 7 macro
A Dsuniv-ccu-f1c100s.h12 #define RST_BUS_MMC0 2 macro
A Dsun8i-a23-a33-ccu.h53 #define RST_BUS_MMC0 7 macro
A Dsun8i-a83t-ccu.h56 #define RST_BUS_MMC0 8 macro
A Dsun50i-a64-ccu.h54 #define RST_BUS_MMC0 8 macro
A Dsun8i-h3-ccu.h55 #define RST_BUS_MMC0 7 macro
A Dsun50i-a100-ccu.h24 #define RST_BUS_MMC0 15 macro
A Dsun50i-h616-ccu.h23 #define RST_BUS_MMC0 14 macro
A Dsun50i-h6-ccu.h27 #define RST_BUS_MMC0 18 macro
A Dsun20i-d1-ccu.h25 #define RST_BUS_MMC0 15 macro
A Dsun8i-r40-ccu.h56 #define RST_BUS_MMC0 8 macro
/linux-6.3-rc2/drivers/clk/sunxi-ng/
A Dccu-sun8i-v3s.c654 [RST_BUS_MMC0] = { 0x2c0, BIT(8) },
689 [RST_BUS_MMC0] = { 0x2c0, BIT(8) },
A Dccu-suniv-f1c100s.c484 [RST_BUS_MMC0] = { 0x2c0, BIT(8) },
A Dccu-sun8i-h3.c889 [RST_BUS_MMC0] = { 0x2c0, BIT(8) },
952 [RST_BUS_MMC0] = { 0x2c0, BIT(8) },
A Dccu-sun8i-a23.c680 [RST_BUS_MMC0] = { 0x2c0, BIT(8) },
A Dccu-sun8i-a33.c725 [RST_BUS_MMC0] = { 0x2c0, BIT(8) },
A Dccu-sun8i-a83t.c809 [RST_BUS_MMC0] = { 0x2c0, BIT(8) },
A Dccu-sun50i-a64.c866 [RST_BUS_MMC0] = { 0x2c0, BIT(8) },
A Dccu-sun50i-h616.c1005 [RST_BUS_MMC0] = { 0x84c, BIT(16) },
A Dccu-sun50i-a100.c1081 [RST_BUS_MMC0] = { 0x84c, BIT(16) },
A Dccu-sun50i-h6.c1099 [RST_BUS_MMC0] = { 0x84c, BIT(16) },
/linux-6.3-rc2/arch/arm/boot/dts/
A Dsuniv-f1c100s.dtsi109 resets = <&ccu RST_BUS_MMC0>;
A Dsun8i-v3s.dtsi232 resets = <&ccu RST_BUS_MMC0>;
/linux-6.3-rc2/arch/arm64/boot/dts/allwinner/
A Dsun50i-h616.dtsi271 resets = <&ccu RST_BUS_MMC0>;
/linux-6.3-rc2/arch/riscv/boot/dts/allwinner/
A Dsunxi-d1s-t113.dtsi392 resets = <&ccu RST_BUS_MMC0>;

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