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/linux-6.3-rc2/arch/x86/crypto/
A Dcast5-avx-x86_64-asm_64.S462 vpshufd $0x4f, RX, RX;
512 vpshufb R1ST, RX, RX;
515 vpsubq RTMP, RX, RX; /* le: IV1, IV0 */
517 vpsubq RKR, RX, RX;
519 vpsubq RKR, RX, RX;
521 vpsubq RKR, RX, RX;
523 vpsubq RKR, RX, RX;
525 vpsubq RKR, RX, RX;
527 vpsubq RKR, RX, RX;
529 vpsubq RKR, RX, RX;
[all …]
A Dcast6-avx-x86_64-asm_64.S47 #define RX %xmm8 macro
126 F_head(b1, RX, RGI1, RGI2, op0); \
127 F_head(b2, RX, RGI3, RGI4, op0); \
129 F_tail(b1, RX, RGI1, RGI2, op1, op2, op3); \
132 vpxor a1, RX, a1; \
265 inpack_blocks(RA1, RB1, RC1, RD1, RTMP, RX, RKRF, RKM);
266 inpack_blocks(RA2, RB2, RC2, RD2, RTMP, RX, RKRF, RKM);
289 outunpack_blocks(RA1, RB1, RC1, RD1, RTMP, RX, RKRF, RKM);
290 outunpack_blocks(RA2, RB2, RC2, RD2, RTMP, RX, RKRF, RKM);
313 inpack_blocks(RA1, RB1, RC1, RD1, RTMP, RX, RKRF, RKM);
[all …]
/linux-6.3-rc2/arch/arc/lib/
A Dmemcpy-archs.S9 # define SHIFT_1(RX,RY,IMM) asl RX, RY, IMM ; << argument
10 # define SHIFT_2(RX,RY,IMM) lsr RX, RY, IMM ; >> argument
11 # define MERGE_1(RX,RY,IMM) asl RX, RY, IMM argument
13 # define EXTRACT_1(RX,RY,IMM) and RX, RY, 0xFFFF argument
14 # define EXTRACT_2(RX,RY,IMM) lsr RX, RY, IMM argument
16 # define SHIFT_1(RX,RY,IMM) lsr RX, RY, IMM ; >> argument
20 # define EXTRACT_1(RX,RY,IMM) lsr RX, RY, IMM argument
25 # define LOADX(DST,RX) ldd.ab DST, [RX, 8] argument
26 # define STOREX(SRC,RX) std.ab SRC, [RX, 8] argument
30 # define LOADX(DST,RX) ld.ab DST, [RX, 4] argument
[all …]
A Dmemcpy-archs-unaligned.S12 # define LOADX(DST,RX) ldd.ab DST, [RX, 8] argument
13 # define STOREX(SRC,RX) std.ab SRC, [RX, 8] argument
17 # define LOADX(DST,RX) ld.ab DST, [RX, 4] argument
18 # define STOREX(SRC,RX) st.ab SRC, [RX, 4] argument
/linux-6.3-rc2/Documentation/gpu/amdgpu/
A Ddgpu-asic-info-table.csv12 Radeon RX 470 /480 /570 /580 /590 Series - AMD Radeon (TM) (Pro WX) 5100 /E9390 /E9560 /E9565 /V735…
13 Radeon (TM) (RX|Pro WX) E9260 /460 /V5300X /550 /560(X) Series, POLARIS11, DCE 11.2, 8, VCE 3.4 / U…
14 Radeon (RX/Pro) 500 /540(X) /550 /640 /WX2100 /WX3100 /WX200 Series, POLARIS12, DCE 11.2, 8, VCE 3.…
15 Radeon (RX|TM) (PRO|WX) Vega /MI25 /V320 /V340L /8200 /9100 /SSG MxGPU, VEGA10, DCE 12, 9.0.1, VCE …
19 AMD Radeon (RX|Pro) 5600(M|XT) /5700 (M|XT|XTB) /W5700, NAVI10, DCN 2.0.0, 10.1.10, VCN 2.0.0, 5.0.0
21 AMD Radeon RX 6800(XT) /6900(XT) /W6800, SIENNA_CICHLID, DCN 3.0.0, 10.3.0, VCN 3.0.0, 5.2.0
22 AMD Radeon RX 6700 XT / 6800M / 6700M, NAVY_FLOUNDER, DCN 3.0.0, 10.3.2, VCN 3.0.0, 5.2.2
23 AMD Radeon RX 6600(XT) /6600M /W6600 /W6600M, DIMGREY_CAVEFISH, DCN 3.0.2, 10.3.4, VCN 3.0.16, 5.2.4
24 AMD Radeon RX 6500M /6300M /W6500M /W6300M, BEIGE_GOBY, DCN 3.0.3, 10.3.5, VCN 3.0.33, 5.2.5
25 AMD Radeon RX 7900 XT /XTX, , DCN 3.2.0, 11.0.0, VCN 4.0.0, 6.0.0
[all …]
/linux-6.3-rc2/Documentation/devicetree/bindings/net/
A Dmicrel-ksz90x1.txt49 - rxdv-skew-ps : Skew control of RX CTL pad
52 - rxd0-skew-ps : Skew control of RX data 0 pad
53 - rxd1-skew-ps : Skew control of RX data 1 pad
54 - rxd2-skew-ps : Skew control of RX data 2 pad
55 - rxd3-skew-ps : Skew control of RX data 3 pad
137 - rxc-skew-ps : Skew control of RX clock pad
142 - rxdv-skew-ps : Skew control of RX CTL pad
144 - rxd0-skew-ps : Skew control of RX data 0 pad
145 - rxd1-skew-ps : Skew control of RX data 1 pad
146 - rxd2-skew-ps : Skew control of RX data 2 pad
[all …]
A Dethernet-controller.yaml77 # RX and TX delays are added by the MAC when required
80 # RGMII with internal RX and TX delays provided by the PHY,
81 # the MAC should not add the RX or TX delays in this case
84 # RGMII with internal RX delay provided by the PHY, the MAC
85 # should not add an RX delay in this case
243 controllers that have configurable RX internal delays. If this
244 property is present then the MAC applies the RX delay.
A Dxilinx_axienet.txt7 segments of memory for buffering TX and RX, as well as the capability of
8 offloading TX/RX checksum calculation off the processor.
24 - interrupts : Should be a list of 2 or 3 interrupts: TX DMA, RX DMA,
26 specified, the TX/RX DMA interrupts should be on that node
41 - xlnx,rxcsum : Same values as xlnx,txcsum but for RX checksum offload
66 device (DMA registers and DMA TX/RX interrupts) rather
/linux-6.3-rc2/drivers/spi/
A Dspi-loopback-test.c91 .rx_buf = RX(0),
129 .rx_buf = RX(0),
196 .rx_buf = RX(0),
213 .rx_buf = RX(0),
230 .rx_buf = RX(0),
244 .rx_buf = RX(0),
272 .rx_buf = RX(0),
287 .rx_buf = RX(0),
305 .rx_buf = RX(0),
313 .rx_buf = RX(0),
[all …]
/linux-6.3-rc2/Documentation/networking/device_drivers/can/freescale/
A Dflexcan.rst13 For most flexcan IP cores the driver supports 2 RX modes:
20 configured for RX-FIFO mode.
22 The RX FIFO mode uses a hardware FIFO with a depth of 6 CAN frames,
40 more performant "RX mailbox" mode and will use "RX FIFO" mode
47 This mode activates the "RX mailbox mode" for better performance, on
/linux-6.3-rc2/drivers/net/ethernet/mellanox/mlx4/
A Den_cq.c104 if (cq->type == RX) { in mlx4_en_activate_cq()
131 if (cq->type == RX) in mlx4_en_activate_cq()
134 if ((cq->type != RX && priv->hwtstamp_config.tx_type) || in mlx4_en_activate_cq()
135 (cq->type == RX && priv->hwtstamp_config.rx_filter)) in mlx4_en_activate_cq()
153 case RX: in mlx4_en_activate_cq()
180 cq->type == RX) in mlx4_en_destroy_cq()
/linux-6.3-rc2/Documentation/networking/device_drivers/ethernet/toshiba/
A Dspider_net.rst18 The Structure of the RX Ring.
20 The receive (RX) ring is a circular linked list of RX descriptors,
36 spidernet device driver) allocates a set of RX descriptors and RX
47 flowing RX traffic, every descr behind it should be marked "full",
57 all of those behind it should be "not-in-use". When RX traffic is not
68 is flowing RX traffic, everything in front of the head pointer should
70 RX traffic is flowing, then the head pointer can catch up to the tail
113 The RX RAM full bug/feature
116 As long as the OS can empty out the RX buffers at a rate faster than
124 will be set in GHIINT1STS). When the RX ram full condition occurs,
[all …]
/linux-6.3-rc2/Documentation/devicetree/bindings/dma/
A Dintel,ldma.yaml67 DMA byte enable is only valid for DMA write(RX).
79 Enable RX dynamic burst write. When it is enabled, the DMA does RX dynamic burst;
80 if it is disabled, the DMA RX will still support programmable fixed burst size of 2,4,8,16.
81 It only applies to RX DMA and memcopy DMA.
/linux-6.3-rc2/Documentation/networking/
A Dmac80211-auth-assoc-deauth.txt32 driver->mac80211: RX probe response
36 driver->mac80211: RX auth frame
40 driver->mac80211: RX auth frame
44 mac80211->userspace: RX auth frame
60 driver->mac80211: RX assoc response
A Daf_xdp.rst24 syscall. Associated with each XSK are two rings: the RX ring and the
25 TX ring. A socket can receive packets on the RX ring and it can send
28 to have at least one of these rings for each socket. An RX or TX
44 to fill in with RX packet data. References to these frames will then
45 appear in the RX ring once each packet has been received. The
48 space, for either TX or RX. Thus, the frame addrs appearing in the
50 TX ring. In summary, the RX and FILL rings are used for the RX path
182 RX Ring
190 descriptors will (or can) appear on the RX ring.
373 RX path, or by calling sendto().
[all …]
/linux-6.3-rc2/sound/soc/fsl/
A Dimx-audio-rpmsg.c48 spin_lock_irqsave(&info->lock[RX], flags); in imx_audio_rpmsg_cb()
53 spin_unlock_irqrestore(&info->lock[RX], flags); in imx_audio_rpmsg_cb()
54 info->callback[RX](info->callback_param[RX]); in imx_audio_rpmsg_cb()
A Dfsl_ssi.c56 #define RX 0 macro
407 int dir = tx ? TX : RX; in fsl_ssi_config_enable()
511 int adir = tx ? RX : TX; in fsl_ssi_config_disable()
512 int dir = tx ? TX : RX; in fsl_ssi_config_disable()
591 vals[RX].srcr = SSI_SRCR_RFEN0; in fsl_ssi_setup_regvals()
599 vals[RX].scr = vals[TX].scr = 0; in fsl_ssi_setup_regvals()
602 vals[RX].srcr |= SSI_SRCR_RFEN1; in fsl_ssi_setup_regvals()
607 vals[RX].sier |= SSI_SIER_RDMAE; in fsl_ssi_setup_regvals()
610 vals[RX].sier |= SSI_SIER_RIE; in fsl_ssi_setup_regvals()
876 vals[RX].srcr |= SSI_SRCR_RFEN1; in fsl_ssi_hw_params()
[all …]
/linux-6.3-rc2/Documentation/devicetree/bindings/clock/
A Dqcom,sa8775p-gcc.yaml26 - description: UFS memory first RX symbol clock
27 - description: UFS memory second RX symbol clock
29 - description: UFS card first RX symbol clock
30 - description: UFS card second RX symbol clock
A Dqcom,gcc-apq8084.yaml32 - description: UFS RX symbol 0 clock
33 - description: UFS RX symbol 1 clock
37 - description: SATA RX clock
A Dqcom,gcc-sc8280xp.yaml26 - description: UFS memory first RX symbol clock
27 - description: UFS memory second RX symbol clock
29 - description: UFS card first RX symbol clock
30 - description: UFS card second RX symbol clock
/linux-6.3-rc2/Documentation/networking/device_drivers/ethernet/google/
A Dgve.rst33 - Bar2 - IRQ, RX and TX doorbells
138 - Every TX and RX queue is assigned a notification block.
140 - TX and RX buffers queues, which send descriptors to the device, use MMIO
143 - RX and TX completion queues, which receive descriptors from the device, use a
150 - It's the driver's responsibility to ensure that the RX and TX completion
154 - TX packets have a 16 bit completion_tag and RX buffers have a 16 bit
155 buffer_id. These will be returned on the TX completion and RX queues
165 The driver posts fixed sized buffers to HW on the RX buffer queue. The packet
166 received on the associated RX queue may span multiple descriptors.
/linux-6.3-rc2/Documentation/devicetree/bindings/sound/
A Dnvidia,tegra30-ahub.txt59 For RX CIFs, the numbers indicate the register number within AHUB routing
60 register space (APBIF 0..3 RX, I2S 0..5 RX, DAM 0..2 RX 0..1, SPDIF RX 0..1).
A Dallwinner,sun4i-a10-i2s.yaml94 - description: RX DMA Channel
98 data. In such a case, the RX DMA channel is to be omitted.
108 data. In such a case, the RX name is to be omitted.
114 - description: RX DMA Channel
A Drockchip,i2s-tdm.yaml52 - description: clock for RX
96 description: Use TX BCLK/LRCK for both TX and RX.
100 description: Use RX BCLK/LRCK for both TX and RX.
108 Defines the mapping of I2S RX sdis to I2S data bus lines.
/linux-6.3-rc2/arch/arm64/boot/dts/amlogic/
A Dmeson-gxbb-nanopi-k2.dts237 gpio-line-names = "UART TX", "UART RX", "Power Control", "Power Key In",
248 "Eth MDIO", "Eth MDC", "Eth RGMII RX Clk",
249 "Eth RX DV", "Eth RX D0", "Eth RX D1", "Eth RX D2",
250 "Eth RX D3", "Eth RGMII TX Clk", "Eth TX En",
286 "Bluetooth UART TX", "Bluetooth UART RX",

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