| /linux-6.3-rc2/arch/arm/boot/dts/ |
| A D | ste-dbx5x0-pinctrl.dtsi | 17 pins = "GPIO0_AJ5", "GPIO2_AH4"; /* CTS+RXD */
28 pins = "GPIO0_AJ5", "GPIO2_AH4"; /* CTS+RXD */
49 pins = "GPIO4_AH6"; /* RXD */
60 pins = "GPIO4_AH6"; /* RXD */
103 pins = "GPIO29_W2"; /* RXD */
114 pins = "GPIO29_W2"; /* RXD */
548 "GPIO15_AC3", /* RXD */
591 pins = "GPIO196_AG26"; /* RXD */
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| A D | ste-href-family-pinctrl.dtsi | 23 pins = "GPIO218_AH11"; /* RXD */
41 pins = "GPIO218_AH11"; /* RXD */
58 "GPIO218_AH11"; /* RXD */
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| A D | ste-hrefprev60.dtsi | 80 pins = "GPIO145_C13"; /* RXD */
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| A D | sama5d4.dtsi | 1359 <AT91_PIOE 29 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* RXD */
1368 <AT91_PIOC 25 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* RXD */
1377 <AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* RXD */
1392 <AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* RXD */
1407 <AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* RXD - conflicts with G0_CRS, ISI_HSYNC */
1422 <AT91_PIOE 16 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* RXD */
1431 <AT91_PIOE 26 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* RXD */
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| A D | lan966x-kontron-kswitch-d10-mmt.dtsi | 75 /* RXD, TXD */
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| A D | lan966x-pcb8309.dts | 136 /* RXD, TXD */
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| A D | r7s9210-rza2mevb.dts | 14 * - RXD = CN17-9,
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| A D | ste-hrefv60plus.dtsi | 369 /* Normally UART1 RXD, now dangling */
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| A D | ste-snowball.dts | 569 pins = "GPIO145_C13"; /* RXD */
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| /linux-6.3-rc2/Documentation/devicetree/bindings/net/ |
| A D | mediatek-bluetooth.txt | 58 - pinctrl-0: Should contain UART RXD low when the device is powered up to
66 - boot-gpios: GPIO same to the pin as UART RXD and used to keep LOW when
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| A D | rockchip-dwmac.yaml | 98 description: Delay value for RXD timing. Range value is 0~0x7F, 0x10 as default.
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| A D | xilinx_axienet.txt | 48 axis_clk: AXI4-Stream clock for TXD RXD TXC and RXS interfaces
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| /linux-6.3-rc2/arch/arm64/boot/dts/renesas/ |
| A D | rzg2ul-smarc-pinfunction.dtsi | 113 <RZG2L_PORT_PINMUX(3, 3, 2)>; /* RXD */
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| A D | rzg2lc-smarc-pinfunction.dtsi | 120 <RZG2L_PORT_PINMUX(45, 3, 1)>; /* RXD */
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| A D | rzg2l-smarc-pinfunction.dtsi | 123 <RZG2L_PORT_PINMUX(45, 3, 1)>; /* RXD */
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| /linux-6.3-rc2/drivers/mtd/nand/raw/ |
| A D | mxic_nand.c | 64 #define RXD 0x24 macro
374 data = readl(nfc->regs + RXD); in mxic_nfc_data_xfer()
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| /linux-6.3-rc2/drivers/mailbox/ |
| A D | bcm-pdc-mailbox.c | 71 #define RXD(x, max_mask) XXD((x), (max_mask)) macro
74 #define NEXTRXD(i, max_mask) RXD((i) + 1, (max_mask))
75 #define PREVRXD(i, max_mask) RXD((i) - 1, (max_mask))
77 #define NRXDACTIVE(h, t, max_mask) RXD((t) - (h), (max_mask))
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| /linux-6.3-rc2/Documentation/devicetree/bindings/pinctrl/ |
| A D | renesas,rzn1-pinctrl.yaml | 122 * Set the pull-up on the RXD pin of the UART.
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| /linux-6.3-rc2/Documentation/devicetree/bindings/iio/addac/ |
| A D | adi,ad74115.yaml | 284 3 - Control HART RXD
285 4 - Monitor HART RXD
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| /linux-6.3-rc2/drivers/spi/ |
| A D | spi-mxic.c | 65 #define RXD 0x24 macro
377 data = readl(mxic->regs + RXD); in mxic_spi_data_xfer()
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| /linux-6.3-rc2/arch/powerpc/boot/dts/ |
| A D | mpc832x_mds.dts | 11 * 1) On chip U61, lift (disconnect) pins 21 (TXD) and 22 (RXD) from the board.
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| /linux-6.3-rc2/arch/arm64/boot/dts/freescale/ |
| A D | imx8qxp-colibri.dtsi | 212 /* Colibri optional CAN on UART_A TXD/RXD */
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| /linux-6.3-rc2/arch/arm64/boot/dts/rockchip/ |
| A D | rk3326-odroid-go.dtsi | 541 /* EXT Header(P2): 2(RXD:GPIO1.C0),3(TXD:.C1),4(CTS:.C2),5(RTS:.C3) */
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| /linux-6.3-rc2/Documentation/networking/dsa/ |
| A D | sja1105.rst | 341 In the RMII spec, the PHY can transmit extra out-of-band signals via RXD[1:0].
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| /linux-6.3-rc2/Documentation/networking/ |
| A D | phy.rst | 90 for the receive data lines (RXD[3:0]) processed by the PHY device
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